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d a t a sh eet product speci?cation supersedes data of 1999 dec 03 file under integrated circuits, ic02 2000 aug 04 integrated circuits tda9874a digital tv sound demodulator/decoder
2000 aug 04 2 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a contents 1 features 2 general description 2.1 supported standards 3 ordering information 4 block diagram 5 pinning 6 functional description 6.1 description of the demodulator and decoder section 6.2 description of the dsp 6.3 description of the analog audio section 7i 2 c-bus control 7.1 introduction 7.2 power-up state 7.3 slave receiver mode 7.4 slave transmitter mode 8i 2 s-bus description 9 limiting values 10 thermal characteristics 11 characteristics 12 application diagrams 13 package outlines 14 soldering 14.1 introduction 14.2 through-hole mount packages 14.3 surface mount packages 14.4 suitability of ic packages for wave, reflow and dipping soldering methods 15 data sheet status 16 definitions 17 disclaimers 18 purchase of philips i 2 c components
2000 aug 04 3 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 1 features sound if (sif) input switch sif automatic gain control (agc) with 24 db control range switchable 10 db sif input attenuator sif 8-bit analog-to-digital converter (adc) easy tv standard programming option differential quadrature phase shift keying (dqpsk) demodulation for different standards, simultaneously with 1-channel fm demodulation near instantaneous companded audio multiplex (nicam) decoding (b/g, d/k, i and l standard) 2-carrier multi-standard fm demodulation (b/g, d/k, i and m standard) single carrier high deviation fm mono demodulation mode decoding for three analog multi-channel systems (a2) and satellite sound adaptive de-emphasis for satellite programmable identification (b/g, d/k and m standard) and different identification times fm pilot carrier presence detector optional am demodulation for l standard, simultaneously with nicam monitor selection for fm/am demodulator outputs and fm and nicam signals with peak option automatic fm dematrixing option digital crossbar switch i 2 s-bus serial audio output with matrix, level adjust and mute dual audio digital-to-analog converter (dac) from digital crossbar switch to analog crossbar switch, bandwidth 15 khz automatic volume level (avl) control analog crossbar switch with inputs for mono and stereo output selection of mono, stereo, dual, dual a or dual b additional mono output with automatic select 20 khz bandwidth for analog path standby mode automatic output selection for tv applications. 2 general description the tda9874a is a single-chip digital tv sound demodulator/decoder (dtvsd) for analog and digital multi-channel sound systems in tv/vcr sets and satellite receivers. 2.1 supported standards the multi-standard/multi-stereo capability of the tda9874a is of interest in europe, hong kong/pr china and south east asia. this includes b/g, d/k, i, m and l standards. in other application areas there exist subsets of the standard combinations or only single standards are transmitted. all a2 (analog 2-carrier) and nicam systems are supported. m standard (with mono or btsc stereo sound) can be received and processed in mono sound mode. the am sound of l/l standard is normally demodulated in the 1st sound if. the resulting af signal has to be entered into the mono audio input of the tda9874a. a second possibility is to use the internal am demodulator stage (with 6.5 mhz intercarrier), which gives limited performance. korea has a stereo sound system similar to europe which is supported by the tda9874a. differences include deviation, modulation contents and identification. it is based on m standard. for all fm standards a high deviation mode for a single carrier monaural sound demodulation is selectable. an overview of the supported standards, sound systems and their key parameters is given in tables 1 to 3. the analog multi-channel systems are sometimes also referred to as 2-carrier systems (2cs).
2000 aug 04 4 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 2.1.1 a nalog 2- carrier systems table 1 frequency modulation table 2 identi?cation for a2 systems 2.1.2 2- carrier systems with nicam table 3 nicam notes 1. see ebu nicam 728 specification or equivalent specification. 2. not yet officially defined. standard sound system carrier frequency (mhz) fm deviation (khz) modulation bandwidth/ de-emphasis (khz/ m s) nom. max. over. sc1 sc2 m mono 4.5 15 25 50 mono - 15/75 m a2 4.5/4.724 15 25 50 1 2 (l + r) 1 2 (l - r) 15/75 (korea) b/g a2 5.5/5.742 27 50 80 1 2 (l + r) r 15/50 i mono 6.0 27 50 80 mono - 15/50 d/k (2) a2 6.5/6.742 27 50 80 1 2 (l + r) r 15/50 d/k (1) a2 6.5/6.258 27 50 80 1 2 (l + r) r 15/50 d/k (3) a2 6.5/5.742 27 50 80 1 2 (l + r) r 15/50 parameter a2; a2* a2+ (korea) pilot frequency 54.6875 khz = 3.5 line frequency 55.0699 khz = 3.5 line frequency stereo identi?cation frequency dual identi?cation frequency am modulation depth 50% 50% standard sc1 sc2 (mhz) nicam de-emphasis roll- off (%) nicam coding frequency (mhz) type modulation index (%) deviation (khz) nom . max . nom . max . b/g 5.5 fm -- 27 50 5.85 j17 40 note 1 i 6.0 fm -- 27 50 6.552 j17 100 note 1 d/k 6.5 fm -- 27 50 5.85 j17 40 note 2 l 6.5 am 54 100 -- 5.85 j17 40 note 1 117.5 hz line frequency 133 -------------------------------------- - = 149.9 hz line frequency 105 -------------------------------------- - = 274.1 hz line frequency 57 -------------------------------------- - = 276.0 hz line frequency 57 -------------------------------------- - =
2000 aug 04 5 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 2.1.3 s atellite systems an important specification for satellite tv reception is the astra specification. the tda9874a is suitable for the reception of astra and other satellite signals, with sound carrier frequencies from 4 to 9.2 mhz. table 4 fm satellite sound notes 1. for other satellite systems, frequencies of e.g. 5.80, 6.60 or 6.65 mhz can also be received. 2. main channels with high deviation can also be handled. 3. a de-emphasis of 60 m s, or in accordance with j17, is available. 4. m/st/d = mono or stereo or dual language sound. 5. adaptive de-emphasis is compatible to transmitter specification. 3 ordering information carrier type carrier frequency (mhz) modulation index maximum fm deviation (khz) modulation bandwidth/ de-emphasis (khz/ m s) main 6.50 (1) 0.26 85 (2) mono 15/50 (3) sub 7.02/7.20 0.15 50 m/st/d (4) 15/adaptive (5) 7.38/7.56 7.74/7.92 8.10/8.28 type number package name description version tda9874aps sdip42 plastic shrink dual in-line package; 42 leads (600 mil) sot270-1 tda9874ah qfp44 plastic quad ?at package; 44 leads (lead length 2.35 mm); body 14 14 2.2 mm sot205-1
2000 aug 04 6 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 4 block diagram handbook, full pagewidth mhb584 nicam demodulation fm/am demodulation nicam decoder 2-channel analog/ satellite decoder post filter 3 dacs supply dacs opamps reference analog crossbar switch 2-channel output buffers test digital selector digital supply clock dematrix peak detection level adjust identification sda scl addr2 addr1 p2 p1 41 (37) 4 (42) 18 (13) 23 (19) 33 (29) 34 (30) nicam pclk n.c. (10) 15 (8) (12) 17 v dec (21) 25 v ssa3 (27) 31 v ssa2 (20) 24 v dda3 (28) 32 i ref (18) 22 v ref1 (24) 28 v ssd2 (7) 13 v ddd1 (6) 12 v ssd1 (5) 11 v ddd3 v ssd3 (35) 39 (36) 40 v dda1 (3) 9 v ssa1 (4) 10 v ssa4 (44) 6 v ref 2 (41) 3 (39) 1 (40) 2 (38) 42 creset extir extil monoin (26) 30 xtali 20 (15) xtalo 19 (14) sysclk 38 (34) sdo 35 (31) ws 36 (32) sck 37 (33) test1 26 (22) 7 (1) 8 (2) outl outr mono channel output buffers 5 (43) outm test2 21 (17) tp1 16 (11) tp2 14 (9) tp3 (16) i 2 c-bus interface i 2 s-bus interface supply sif input switch agc, adc sif2 27 (23) sif1 29 (25) tda9874aps (tda9874ah) fig.1 block diagram. the pin numbers given in parenthesis refer to the tda9874ah.
2000 aug 04 7 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 5 pinning symbol pin description sdip42 qfp44 extir 1 39 external audio input right channel extil 2 40 external audio input left channel v ref2 3 41 analog reference voltage for dac and operational ampli?ers p2 4 42 second general purpose i/o pin outm 5 43 analog output mono v ssa4 6 44 analog ground supply 4 for analog back-end circuitry outl 7 1 analog output left outr 8 2 analog output right v dda1 9 3 analog supply voltage 1; back-end circuitry 5 v v ssa1 10 4 analog ground supply 1; back-end circuitry v ssd1 11 5 digital ground supply 1; core circuitry v ddd1 12 6 digital supply voltage 1; core voltage regulator circuitry v ssd2 13 7 digital ground supply 2; core circuitry n.c. - 8 not connected tp2 14 9 additional test pin 2; connected to v ssd for normal operation nicam 15 10 serial nicam data output (at 728 khz) tp1 16 11 additional test pin 1; connected to v ssd for normal operation pclk 17 12 nicam clock output (at 728 khz) addr1 18 13 ?rst i 2 c-bus slave address modi?er input xtalo 19 14 crystal oscillator output xtali 20 15 crystal oscillator input tp3 - 16 additional test pin 3; connected to v ssd for normal operation test2 21 17 test pin 2; connected to v ssd for normal operation i ref 22 18 resistor for reference current generation; front-end circuitry addr2 23 19 second i 2 c-bus slave address modi?er input v ssa2 24 20 analog ground supply 2; analog front-end circuitry v dec 25 21 analog front-end circuitry supply voltage decoupling test1 26 22 test pin 1; connected to v ssd for normal operation sif2 27 23 sound if input 2 v ref1 28 24 reference voltage; for analog front-end circuitry sif1 29 25 sound if input 1 creset 30 26 capacitor for power-on reset v ssa3 31 27 digital ground supply 3; front-end circuitry v dda3 32 28 analog front-end circuitry regulator supply voltage 3 (5 v) scl 33 29 i 2 c-bus serial clock input sda 34 30 i 2 c-bus serial data input/output sdo 35 31 i 2 s-bus serial data output ws 36 32 i 2 s-bus word select input/output
2000 aug 04 8 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a sck 37 33 i 2 s-bus clock input/output sysclk 38 34 system clock output v ddd3 39 35 digital supply voltage 3; digital i/o pads v ssd3 40 36 digital ground supply 3; digital i/o pads p1 41 37 ?rst general purpose i/o pin monoin 42 38 analog mono input symbol pin description sdip42 qfp44 handbook, halfpage tda9874aps mhb585 1 2 42 41 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 monoin p1 v ssd3 v ddd3 sysclk sck ws sdo sda scl v dda3 v ssa3 creset sif1 v ref1 sif2 test1 v dec v ssa2 addr2 i ref extir extil v ref2 p2 outm v ssa4 outl outr v dda1 v ssa1 v ssd1 v ddd1 v ssd2 tp2 nicam tp1 pclk addr1 xtalo xtali test2 fig.2 pin configuration (sdip42).
2000 aug 04 9 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a handbook, full pagewidth 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 tda9874ah mhb586 sck ws sdo sda v dda3 v ssa3 creset sif1 v ref1 sif2 outl outr v dda1 v ssa1 v ssd1 v ddd1 n.c. tp2 tp1 scl outm p2 v ref2 extil extir monoin v ssd3 v ddd3 sysclk v ssa4 p1 addr1 xtalo xtali tp3 test2 i ref v ssa2 v dec test1 pclk addr2 v ssd2 nicam fig.3 pin configuration (qfp44). 6 functional description 6.1 description of the demodulator and decoder section 6.1.1 sif inputs two inputs are provided, pin sif1 and pin sif2. for higher sif signal levels the sif input can be attenuated with an internal switchable - 10 db resistor divider. as no specific filters are integrated, both inputs have the same specification giving flexibility in application. the selected signal is passed through an agc circuit and then digitized by an 8-bit adc operating at 24.576 mhz. 6.1.2 agc the gain of the agc amplifier is controlled from the adc output by means of a digital control loop employing hysteresis. the agc has a fast attack behaviour to prevent adc overloads, and a slow decay behaviour to prevent agc oscillations. for am demodulation the agc must be switched off. when switched off, the control loop is reset and fixed gain settings can be chosen (see table 14). the agc can be controlled via the i 2 c-bus; details are given in sections 7.3.2, 7.3.3 and 7.4.6. 6.1.3 m ixer the digitized input signal is fed to the mixers, which mix one or both input sound carriers down to zero if. a 24-bit control word for each carrier sets the required frequency. access to the mixer control word registers is via the i 2 c-bus (see sections 7.3.5 and 7.3.6) or via easy standard programming (esp, see section 7.3.23). when receiving nicam programs, a feedback signal is added to the control word of the second carrier mixer to establish a carrier-frequency loop. 6.1.4 fm and am demodulation an fm or am input signal is fed through a switchable band-limiting filter into a demodulator that can be used for either fm or am demodulation. apart from the standard (fixed) de-emphasis characteristic, an adaptive de-emphasis is available for wegener-panda 1 encoded satellite programs.
2000 aug 04 10 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 6.1.5 fm decoding a 2-carrier stereo decoder recovers the left and right signal channels from the demodulated sound carriers. both the european and korean stereo systems are supported. automatic fm dematrixing is also supported, which means that the fm sound mode identification (mono, stereo or dual) switches the fm dematrix directly. no loop via the microcontroller is needed. for highly overmodulated signals, a high deviation mode for monaural audio sound single carrier demodulation can be selected. nicam decoding is still possible in high deviation mode. 6.1.6 fm identification the identification of the fm sound mode is performed by am synchronous demodulation of the pilot and narrow-band detection of the identification frequencies. the result is available via the i 2 c-bus interface. a selection can be made via the i 2 c-bus for b/g, d/k and m standards, and for three different time constants that represent different trade-offs between speed and reliability of identification. a pilot detector allows the control software to identify an analog 2-carrier (a2) transmission within approximately 0.1 s. automatic fm dematrixing, depending on the identification, is possible. 6.1.7 nicam demodulation the nicam signal is transmitted in a dqpsk code at a bit rate of 728 kbits/s. the nicam demodulator performs dqpsk demodulation and passes the resulting bitstream and clock signal to the nicam decoder and, for evaluation purposes, to various pins. a timing loop controls the frequency of the crystal oscillator to lock the sampling instants to the symbol timing of the nicam data. 6.1.8 nicam decoding the device performs all decoding functions in accordance with the ebu nicam 728 specification . after locking to the frame alignment word, the data is descrambled by applying the defined pseudo-random binary sequence. the device then synchronizes to the periodic frame flag bit c0. the status of the nicam decoder can be read out from the nicam status register by the user (see section 7.4.2). the osb bit indicates that the decoder has locked to the nicam data. the vdsp bit indicates that the decoder has locked to the nicam data and that the data is valid sound data. the c4 bit indicates that the sound conveyed by the fm mono channel is identical to the sound conveyed by the nicam channel. the error byte contains the number of sound sample errors (resulting from parity checking) that occurred in the past 128 ms period. the bit error rate (ber) can be calculated using the following equation: 6.1.9 nicam auto - mute this function is enabled by setting bit amute to logic 0 (see section 7.3.12). upper and lower error limits may be defined by writing appropriate values to two registers in the i 2 c-bus section (see sections 7.3.14 and 7.3.15). when the number of errors in a 128 ms period exceeds the upper error limit, the auto-mute function will switch the output sound from nicam to whatever sound is on the first sound carrier (fm or am) or to the analog mono input. when the error count is smaller than the lower error limit, the nicam sound is restored. the auto-mute function can be disabled by setting bit amute to logic 1. in this case clicks become audible when the error count increases. the user will hear a signal of degrading quality. if no nicam sound is received, the outputs are switched from the nicam channel to the 1st sound carrier. a decision to enable or disable the auto-mute is taken by the microprocessor based on an interpretation of the application control bits c1, c2, c3 and c4, and possibly any additional strategy implemented by the user in the microcontroller software. when the am sound in nicam l systems is demodulated in the 1st sound if and the audio signal connected to the mono input of the tda9874a, the controlling microprocessor has to ensure switching from nicam reception to mono input, if auto-muting is desired. this can be achieved by setting bit amsel = 1 and bit amute = 0. ber bit errors total bits ----------------------- error byte 1.74 10 5 C ? =
2000 aug 04 11 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 6.1.10 c rystal oscillator the digital controlled crystal oscillator (dcxo) is fully integrated. only an external 24.576 mhz crystal is required. 6.1.11 t est pins all test pins are active high. in normal operation of the device they can be left open-circuit, as they have internal pull-down resistors. test functions are for manufacturing tests only and are not available to customers. 6.1.12 p ower fail detector the power fail detector monitors the internal power supply for the digital part of the device. if the supply has temporarily been lower than the specified lower limit, the power failure register bit pfr in subaddress 0 (see section 7.4.1), will be set to logic 1. bit clrpfr, slave register subaddress 1 (see section 7.3.3), resets the power-on reset flip-flop to logic 0. if this is detected, an initialization of the tda9874a has to be performed to ensure reliable operation. 6.1.13 p ower - on reset the reset is active low. in order to perform a reset at power-up, a simple rc circuit may be used which consists of an integrated passive pull-up resistor and an external capacitor connected to ground. the pull-up resistor has a nominal value of 50 k w , which can easily be measured between pins creset and v ddd3 . before the supply voltage has reached a certain minimum level, the state of the circuit is completely undefined and remains in this undefined state until a reset is applied. the reset is guaranteed to be active when: the power supply is within the specified limits (4.5 to 5.5 v) the crystal oscillator (dcxo) is functioning the voltage at pin creset is below 0.3v ddd (1.5 v if v ddd = 5.0 v, typically below 1.8 v). the required capacitor value depends on the gradient of the rising power supply voltage. the time constant of the rc circuit should be clearly larger than the rise time of the power supply [to make sure that the reset condition is always satisfied (see fig.4)], even when considering tolerance spreading. to avoid problems with a too slow discharging of the capacitor at power-down, it may be helpful to add a diode from pin creset to v ddd . it should be noted that the internal esd protection diode does not help here as it only conducts at higher voltages. under difficult power supply conditions (e.g. very slow or non-monotonic ramp-up), it is recommended to drive the reset line from a microcontroller port or the like. 6.2 description of the dsp 6.2.1 l evel scaling all input channels to the digital crossbar switch are equipped with a level adjustment facility to change the signal level in a range of 15 db. adjusting the signal level is intended to compensate for the different modulation parameters of the various tv standards. under nominal conditions it is recommended to scale all input channels to be 15 db below full-scale. this will create sufficient headroom to cope with overmodulation and avoids changes of the volume impression when switching from fm to nicam or vice versa. 6.2.2 nicam pat h the nicam path has a switchable j17 de-emphasis. 6.2.3 nicam auto - mute if nicam is received, the auto-mute is enabled and the signal quality becomes poor. the digital crossbar switches automatically to fm, channel 1 or the analog mono input, as selected by bit amsel. this automatic switching depends on the nicam bit error rate. the auto-mute function can be disabled via the i 2 c-bus. handbook, halfpage mhb587 reset active guaranteed 1.5 5 v t v creset < 0.3v ddd v ddd > 4.5 v fig.4 reset at power-on.
2000 aug 04 12 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 6.2.4 fm (am) pat h a high-pass filter suppresses dc offsets from the fm demodulator that may occur due to carrier frequency offsets, and supplies the fm monitor function with dc values, e.g. for the purpose of microprocessor controlled carrier search or fine tuning functions. an adaptive de-emphasis is available for wegener-panda 1 encoded satellite programs. the de-emphasis stage offers a choice of settings for the supported tv standards. the 2-channel decoder performs the dematrixing of 1 2 (l + r), r to l and r signals of 1 2 (l + r) and 1 2 (l - r) to l and r signals or of channel 1 and channel 2 to l and r signals, as demanded by the different tv standards or user preferences. automatic fm dematrixing is also supported. using the high deviation mode, only channel 1 (mono) can be demodulated. the scaling is - 6 db compared to 2-channel decoding. 6.2.5 m onitor this function provides data words from the fm demodulator outputs and fm and nicam signals for external use, such as carrier search or fine tuning. the peak level of these signals can also be observed. source selection and data read out are performed via the i 2 c-bus. 6.2.6 d igital crossbar switch the input channels are derived from the fm and nicam paths, while the output channels comprise i 2 s-bus and the audio dacs to the analog crossbar switch. it should be noted that there is no connection from the external analog audio inputs to the digital crossbar switch. 6.2.7 d igital audio output the digital audio output interface comprises an i 2 s-bus output port and a system clock output. the i 2 s-bus port is equipped with a level adjustment facility that can change the signal level in a 15 db range in 1 db steps. muting is possible, too, and outputs can be disabled to improve emc performance. the i 2 s-bus output matrix provides the functions for forced mono, stereo, channel swap, channel 1 or channel 2. automatic selection for tv applications is possible. in this case the microcontroller program only has to provide a user controlled sound a or sound b selection. 6.2.8 s tereo channel to the analog crossbar path a level adjustment function is provided with control positions of 0 db, +3 db, +6 db and +9 db in combination with the audio dacs. the automatic volume level (avl) function provides a constant output level of - 20 db (full-scale) for input levels between 0 db (full-scale) and - 26 db (full-scale). there are some ?xed decay time constants to choose from, i.e. 2, 4 or 8 seconds. automatic selection for tv applications is possible. in this case the microcontroller program only has to provide a user controlled sound a or sound b selection. 6.2.9 g eneral the level adjustment functions can provide signal gain at multiple locations. great care has to be taken when using gain with large input signals, e.g., due to overmodulation, in order not to exceed the maximum possible signal swing, which would cause severe signal distortion. the nominal signal level of the various signal sources to the digital crossbar switch should be 15 db below digital full-scale ( - 15 db full-scale).
2000 aug 04 13 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... handbook, full pagewidth mhb588 fixed de-emphasis nicam 2-channel decoder fixed de-emphasis adaptive de-emphasis dc filter fm digital crossbar select level adjust level adjust monitor matrix level adjust level adjust mono dac level adjust stereo dacs i 2 s-bus i 2 c-bus fig.5 dsp data flow diagram.
2000 aug 04 14 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 6.3 description of the analog audio section 6.3.1 a nalog crossbar switch and analog matrix the tda9874a has one external analog stereo input, one mono input, one 2-channel and one single-channel output port. analog source selector switches are employed to provide the desired analog signal routing capability, which is done by the analog crossbar switch section. the basic signal routing philosophy of the tda9874a is that each switch handles two signal channels at the same time (e.g. left and right, language a and b) directly at the source. for an overview of the signal flow see fig.7. each source selector switch is followed by an analog matrix to perform further selection tasks, such as putting a signal from one input channel, say language a, to both output channels or for swapping left and right channels. the analog matrix provides the functions given in table 5. automatic matrixing for tv applications is also supported. all switches and matrices are controlled via the i 2 c-bus. table 5 analog matrix functions 6.3.2 e xternal and mono inputs the external and mono inputs accept signal levels of up to 1.4 v (rms). by adding external series resistors to provide suitable attenuation, the external input could be used as a scart input. whenever the external or mono input is selected, the output of the dac is muted to improve the crosstalk performance. 6.3.3 a udio dac s the tda9874a comprises a 2-channel audio dac and an additional single-channel audio dac for feeding signals from the dsp section to the analog crossbar switch. these dacs have a resolution of 15 bits and employ four-times oversampling and noise shaping. 6.3.4 a udio output buffers the output buffers provide a gain of 0 db and offer a muting possibility. the post filter capacitors of the audio dacs are connected to the buffer outputs. 6.3.5 s tandby mode the standby mode (see section 7.3.3) disables most functions and reduces power dissipation of the tda9874a. it provides no other function. internal registers may lose their information in standby mode. therefore, the device needs to be initialized on returning to normal operation. this can be accomplished in the same way as after a power-on reset. mode matrix output l output r output 1 l input r input 2 r input l input 3 l input l input 4 r input r input handbook, full pagewidth mhb589 outr source select matrix mono (am) extil extir dacl dacr dacm outl outm fig.6 switch diagram for the analog audio section.
2000 aug 04 15 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... handbook, full pagewidth mhb590 2-channel decoder fixed de-emphasis level adjust adaptive de-emphasis fm/am demodulator fm/am de-emphasis level adjust nicam decoder nicam demodulator nicam external mono digital crossbar select level adjust avl matrix level adjust dacs analog crossbar switch matrix buffer stereo output matrix buffer mono output i 2 s-bus fig.7 audio signal flow.
2000 aug 04 16 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7i 2 c-bus control 7.1 introduction the tda9874a is controlled only via the i 2 c-bus. control is exercised by writing data to one or more internal registers. status information can be read from an array of registers to let the controlling microprocessor determine whether any action is required. the device has an i 2 c-bus slave transceiver in accordance with the fast-mode specification with a maximum speed of 400 kbits/s. information about the i 2 c-bus can be found in brochure i 2 c-bus and how to use it (order number 9398 393 40011). to avoid conflicts in a real application with other ics providing similar or complementing functions, there are four possible slave addresses available, which can be selected by pins addr1 and addr2 (see table 6). table 6 possible slave addresses the i 2 c-bus interface remains operational in the standby mode of the tda9874a to allow the device to be reactivated via the i 2 c-bus. the device will not respond to a general call on the i 2 c-bus, i.e. when a slave address of 0000 000 is sent by a master. 7.2 power-up state after power-on reset respectively at power-up the device is in the following state: all outputs muted no sound carrier frequency loaded general purpose i/o pins ready for input (high) input sif1 selected with: C agc on C sif 10 db attenuator off C small hysteresis. demodulators for both sound carriers set to fm with: C identification for b/g, d/k, identification mode slow C level adjustment set to 0 db C de-emphasis 50 m s C dematrix set to mono C adaptive de-emphasis off. analog outputs are muted and connected to dacs digital audio interface all outputs off monitor set to carrier 1 dc output. after power-on reset or power-up, a device initialization has to be performed via the i 2 c-bus to put the tda9874a into the proper mode of operation, in accordance with the desired tv standard, etc. this can be done by writing to all registers with a single i 2 c-bus transmission (such as a refresh operation) or by writing selectively only to those registers, the contents of which need to be changed with regard to the power-up state. easy standard programming (esp) can also be used. addr2 addr1 slave address a6 a5 a4 a3 a2 a1 a0 0 0 1011000 0 1 1011001 1 0 1011010 1 1 1011011
2000 aug 04 17 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3 slave receiver mode as a slave receiver, the tda9874a provides 26 registers for storing commands and data. each register is accessed via a so-called subaddress. a subaddress can be thought of as a pointer to an internal memory location. detailed descriptions of the slave receiver registers are given in sections 7.3.2 to 7.3.21. it is allowed to send more than one data byte per transmission to the tda9874a. in this event, the subaddress is automatically incremented after each data byte, resulting in storing the sequence of data bytes at successive register locations, starting at subaddress. a transmission can start at any valid subaddress. each byte that is properly stored, is acknowledged with a (acknowledge). if an attempt is made to write data to a non-existing subaddress, the device acknowledges with a (not acknowledge), therefore telling the i 2 c-bus master to abort the transmission. there is no wrap-around of subaddresses. commands and data will be processed as soon as they have been received completely. functions requiring more than one byte will thus be executed only after all bytes for that function have been received. if the transmission is terminated (stop condition) before all bytes have been received, the incomplete data for that function is ignored. data patterns sent to the various subaddresses are not checked for being illegal or not at that address, except for the level adjustment functions. detection of a stop condition without a preceding acknowledge bit is regarded as a bus error. in this case, the last operation will not be executed. table 7 i 2 c-bus; slave address, subaddress, data format table 8 explanation of table 7 table 9 format for a transmission employing auto-increment of subaddresses note 1. n data bytes with auto-increment of subaddresses. s slave address 0 a subaddress a data a p bit function s start condition slave address 7-bit device address 0 data direction bit (write to device) a acknowledge subaddress address of register to write to data data byte to be written into register p stop condition s slave address 0 a subaddress a data byte a (1) data a p 7.3.1 p rogramming via the i 2 c- bus the tda9874a can be programmed in the same way as its predecessor (tda9874h) using the subaddresses 0 to 24 or by using esp. 7.3.1.1 programming via subaddresses 0 to 24 while programming the tda9874a, by writing to subaddresses 0 to 24, it is not allowed to access subaddress 255. writing data to subaddress 255 will overwrite the data previously written to subaddresses 3 to 10. this may cause unwanted effects.
2000 aug 04 18 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.1.2 using easy standard programming (esp) this facility simplifies programming by reducing the amount of data to be set-up and transferred via the i 2 c-bus. subaddress 255 gives control of most standard dependent settings of the ic; see esp register in section 7.3.23. when using esp it is recommended not to write data to subaddresses 3 to 10. a possible programming flow for using esp and automatic fm dematrixing (bit tvsm = 1 and bit idswfm = 1) is shown in table 10. it should be noted that the nicam con?guration register and the level adjustment registers for fm and nicam are not affected by esp. table 10 programming the tda9874a by using esp and automatic fm dematrixing register content of register number name 0 agcgr set agcgr = 20h for using the - 10 db attenuator at the sif input, otherwise write a 00h to this register. 1 gconr select the chosen sif input pin by writing data to bit sifsel (bit 0) and choose the agc decay time corresponding to your application by writing the appropriate data to bit agcslow (bit 2). 2 msr set this register according to your sound mode detection algorithm 3to10 - do not write data to these registers while using esp 11 fmmr set fmmr = 80h to choose automatic fm dematrixing 12 c1olar see table 36 13 c2olar see table 37 14 nconr set nconr = 04h to select fm source automatically if nicam is not available 15 nolar see table 40 16 nlelr set nlelr = 14h (default setting after power-on reset) if no other value is chosen 17 nuelr set nuelr = 50h (default setting after power-on reset) if no other value is chosen 18 amconr set amconr = f9h to enable all analog outputs 19 sdacosr set sdacosr = 81h to select +6 db gain (see table 46) and nicam or fm output 20 aosr to select an internal source set aosr = 80h to select dual a or set aosr = c0h to select dual b (if dual mode is transmitted) to all analog outputs. for selecting an external source see section 7.3.18. 21 daiconr use only for i 2 s-bus output, see detailed description in section 7.3.19 22 i 2 sosr use only for i 2 s-bus output, see detailed description in section 7.3.20 23 i 2 solar use only for i 2 s-bus output, see detailed description in section 7.3.21 24 mdacosr set mdacosr = 82h to select dual a or set mdacosr = 83h to select dual b (if dual mode is transmitted) to all analog outputs. for selecting an external source see section 7.3.22. 255 esp see detailed description in section 7.3.23
2000 aug 04 19 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... table 11 overview of the slave receiver registers subaddress (decimal) data function 7 6543210 0 0 0 agclev b4 b3 b2 b1 b0 agc gain selection (ignored if agc on) 1 p2out p1out stdby init clrpfr agcslow agcoff sifsel general con?guration 2 peak 0 0 mcsm1 mcsm0 0 mss1 mss0 monitor select 3 b7 b6 b5 b4 b3 b2 b1 b0 carrier 1 frequency; ms part 4 b7 b6 b5 b4 b3 b2 b1 b0 carrier 1 frequency 5 b7 b6 b5 b4 b3 b2 b1 b0 carrier 1 frequency; ls part 6 b7 b6 b5 b4 b3 b2 b1 b0 carrier 2 frequency; ms part 7 b7 b6 b5 b4 b3 b2 b1 b0 carrier 2 frequency 8 b7 b5 b5 b4 b3 b2 b1 b0 carrier 2 frequency; ls part 9 idmod1 idmod0 idarea filtbw1 ch2mod1 ch2mod0 filtbw0 ch1mode demodulator con?guration 10 adeem2 fmdsc23 fmdsc22 fmdsc21 adeem1 fmdsc13 fmdsc12 fmdsc11 fm de-emphasis 11 idswfm 0 0 0 0 fdms2 fdms1 fdms0 fm dematrix 12 0 0 0 b4 b3 b2 b1 b0 channel 1 output level adjustment 13 0 0 0 b4 b3 b2 b1 b0 channel 2 output level adjustment 14 dcxopull dcxotest 0 douten 0 amsel ndeem amute nicam con?guration 15 0 0 0 b4 b3 b2 b1 b0 nicam output level adjustment 16 b7 b6 b5 b4 b3 b2 b1 b0 nicam lower error limit 17 b7 b6 b5 b4 b3 b2 b1 b0 nicam upper error limit 18 1 muti2s 1 1 1 mutsout mutmout 1 audio mute control 19 sdgs1 0 avl1 avl0 sdgs0 0 sdos1 sdos0 stereo dac output select 20 tvsm csm2 csm1 csm0 mos1 mos0 sss1 sss0 analog output select
2000 aug 04 20 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... 21 0 0 0 syscl1 syscl0 sysout i2sform is2out digital audio interface con?guration 22 tvsmiis icsm2 icsm1 icsm0 0 0 iss1 iss0 i 2 s-bus output select 23 0 0 0b3b2b1b0b0i 2 s-bus output level adjustment 24 mdgs1 0 0 0 mdgs0 0 mdos1 mdos0 mono dac output select 25 0 0 0 0 0 0 0 0 reserved 255 filtbw1 filtbw0 idmod1 idmod0 epb3 epb2 epb1 epb0 esp subaddress (decimal) data function 7 6543210
2000 aug 04 21 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.2 agc g ain r egister (agcgr) if the agc function is switched off in the general configuration register (see section 7.3.3), the contents of this register defines a fixed gain of the sif input stage. the input voltages given are meant to generate a nearly full-scale output from the sif adc. if the agc is on, the agc gain setting is ignored. after switching off the agc function, the latest gain control setting is copied to the agc gain register. if the agc input level shift bit agclev is set to logic 1 the input signal is scaled with - 10 db. the bit agclev is also active if the agc function is enabled. the default setting after power-on reset is 0000 0000. in table 14 the stated step number corresponds with the sif level read from subaddress 7 (see section 7.4.6); the input voltages should be considered as approximate target values. table 12 agc gain register (subaddress 0) table 13 description of the agc gain register bits 76543210 0 0 agclev agcb4 agcb3 agcb2 agcb1 agcb0 bit name description 7 - this bit is not used and should be set to a logic 0 6 - this bit is not used and should be set to a logic 0 5 agclev if the agc input level shift bit agclev = 1 the input signal is scaled with - 10 db. bit agclev is also active if the automatic gain function is enabled. 4 agcb4 if the automatic gain control function is switched off in the general con?guration register, the contents of this register will de?ne a ?xed gain of the agc stage. 3 agcb3 2 agcb2 1 agcb1 0 agcb0
2000 aug 04 22 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 14 agc gain register 76 5 43210 agc gain (db) max. sif input voltage [mv (rms)] -- agclev agcb4 agcb3 agcb2 agcb1 agcb0 000/111111 0.0 333/1052 000/111110 0.8 304/963 000/111101 1.5 278/881 000/111100 2.3 255/806 000/111011 3.1 233/737 000/111010 3.9 213/674 000/111001 4.6 195/617 000/111000 5.4 178/564 000/110111 6.2 163/516 000/110110 7.0 149/472 000/110101 7.7 136/432 000/110100 8.5 125/395 000/110011 9.3 114/361 000/110010 10.1 104/330 000/110001 10.8 96/302 000/110000 11.6 87/276 000/101111 12.4 80/253 000/101110 13.2 73/231 000/101101 13.9 67/212 000/101100 14.7 61/194 000/101011 15.5 56/177 000/101010 16.3 51/162 000/101001 17.0 47/148 000/101000 17.8 43/135 000/100111 18.6 39/124 000/100110 19.4 36/113 000/100101 20.1 33/104 000/100100 20.9 30/95 000/100011 21.7 27/87 000/100010 22.5 25/79 000/100001 23.2 23/73 000/100000 24.0 21/66
2000 aug 04 23 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.3 g eneral c onfiguration r egister (gconr) the default setting after power-on reset is 1100 0000. table 15 general con?guration register (subaddress 1) table 16 description of the general con?guration register bits 76543210 p2out p1out stdby init clrpfr agcslow agcoff sifsel bit symbol description 7 p2out general purpose i/o pins 1 and 2: these bits control the general purpose input/output pins. the contents of these bits is written directly to the corresponding pins. if an input is desired, the bits must be set to 1 to allow the pins to be pulled to low levels externally. input from the pins is re?ected in the device status register (see section 7.4.1). bit p1out is recommended to be used for switching an sif trap for the adjacent picture carrier in designs that employ such a trap. 6 p1out 5 stdby standby mode on/off: if bit stdby = 1 the tda9874a is set to the standby mode. most functions are disabled and power dissipation is somewhat reduced. if bit stdby = 0 the tda9874a is in its normal mode of operation. on return from standby mode, the device is in its power-on reset mode and needs to be re-initialized with data de?ned by the user. 4 init initialize to default settings: if bit init = 1 it causes initialization of the tda9874a to its default settings. this has the same effect as a power-on reset. in the event of a con?ict between the default settings and any bit set to logic 1 in this register, the bits actually written to this register will overwrite the default settings. this bit is automatically reset to 0 after initialization has been completed. when set to logic 0, the tda9874a is in its normal mode of operation. 3 clrpfr clear power failure register: if bit clrpfr = 1 it resets the clear power failure register. this bit is automatically reset to logic 0 after bit pfr in the device status register has been read. 2 agcslow agc decay time: if bit agcslow = 1 a longer decay time and larger hysteresis are selected for input signals with strong video modulation (conventional intercarrier). this bit has only an effect, if bit agcoff = 0. if bit agcslow = 0 it selects normal attack and decay times for the agc and a small hysteresis. 1 agcoff agc on/off: if bit agcoff = 1 it forces the agc block to a ?xed gain as de?ned in the agc gain register (see section 7.3.2). if bit agcoff = 0 the agc function is enabled and the contents of the agc gain register are ignored. 0 sifsel sif input select: if bit sifsel = 1 it selects pin sif2 for input (recommended for satellite tuner). if bit sifsel = 0 it selects pin sif1 (recommended for terrestrial tv).
2000 aug 04 24 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.4 m onitor s elect r egister (msr) this register is used to define the signal source (the level of which is to be monitored) and the signal channel. data can be monitored e.g. before or after the dc filter at the fm/am demodulator outputs. the peak level of signals can also be observed. the last available data sample can be read out in the i 2 c-bus slave transmitter mode (see section 7.4.5). phase means the differentiated phase output of the fm demodulator and is provided when the demodulator operates in fm mode. the magnitude is supplied in am mode. the default setting after power-on reset is 0000 0000. table 17 monitor select register (subaddress 2) table 18 description of the monitor select register bits table 19 signal channel selection table 20 signal source selection 76543210 peak 0 0 mcsm1 mcsm0 0 mss1 mss0 bit symbol description 7 peak peak level select: if bit peak = 1 it selects the recti?ed peak level of a source to be monitored. peak level value is reset to logic 0 after read-out (see read registers 5 and 6). after changing the monitor signal source for peak calculation it is advisable to ignore the first read-out value due to stored data from previous calculations. 6 - these bits are not used and should be set to logic 0 5 - 4 mcsm1 signal channel select: the state of these bits determine which signal channel is selected; see table 19. 3 mcsm0 2 - this bit is not used and should be set to logic 0 1 mss1 signal source select: the state of these bits determine which signal source is selected; see table 20. 0 mss0 mcsm1 mcsm0 signal channel 00 0 1 ch1 1 0 ch2 mss1 mss0 signal source 0 0 dc output of fm/am demodulator 0 1 magnitude/phase output of fm/am demodulator 1 0 fm/am path output 1 1 nicam path output ch1 ch2 + 2 ----------------------------- -
2000 aug 04 25 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.5 c arrier 1 frequency register this register should not be used when applying esp. three bytes are required to define a 24-bit frequency control word to represent the sound carrier (i.e. mixer) frequency. these three bytes are stored at subaddresses 3 to 5; subaddress 3 being the high byte. execution of the command starts only after all bytes have been received. if an error occurs, e.g. a premature stop condition, partial data for this function is ignored. the relation of the sound carrier frequency and the control word is given in the following formula: where: data = 24-bit frequency control word f mix = desired sound carrier frequency f clk = 12288 mhz (clock frequency of mixer) 2 24 = 16777216 (number of steps in a 24-bit word size). example: a 5.5 mhz sound carrier frequency will be generated by sending the following sequence of data bytes to the tda9874a (data = 7509333 in decimal notation or 729555 in hexadecimal notation): 0111 0010 1001 0101 0101 0101. the default setting after power-on reset is 0000 0000 for all three bytes. data f mix f clk -------- 2 24 = table 21 carrier 1 frequency register high byte (subaddress 3) table 22 carrier 1 frequency register middle byte (subaddress 4) table 23 carrier 1 frequency register low byte (subaddress 5) 76543210 b7 b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0 7.3.6 c arrier 2 frequency register this register should not be used when applying esp. the format is the same as for sound carrier 1, except subaddresses 6 to 8 are used. subaddress 6 holds the high byte. if this register is used, it will be for either the second fm sound carrier of a terrestrial or satellite fm program or for the nicam sound carrier.
2000 aug 04 26 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.7 d emodulator configuration register this register should not be used when applying esp. the default setting after power-on reset is 0000 0000. table 24 demodulator con?guration register (subaddress 9) table 25 description of the demodulator con?guration register bits table 26 identi?cation mode table 27 channel 2 receive mode 76543210 idmod1 idmod0 idarea filtbw1 ch2mod1 ch2mod0 filtbw0 ch1mode bit symbol description 7 idmod1 identi?cation mode for fm sound: these bits de?ne the integrator time of the fm identi?cation. a valid result may be expected after twice this time has expired, at the latest. the longer the time, the more reliable the identi?cation; see table 26. 6 idmod0 5 idarea application area for fm identi?cation: if bit idarea = 1 it selects the fm identi?cation frequencies in accordance with the speci?cation for korea. if bit idarea = 0 the frequencies for europe are selected (b/g and d/k standard). 4 filtbw1 this bit selects the ?lter bandwidth in accordance with table 28 3 ch2mod1 channel 2 receive mode: these bits control the hardware for the second sound carrier in accordance with table 27. the nicam mode employs a wider bandwidth of the decimation ?lters than the fm mode. 2 ch2mod0 1 filtbw0 this bit selects the ?lter bandwidth in accordance with table 28 0 ch1mode channel 1 receive mode: if bit ch1mode = 1 it selects the hardware for the ?rst sound carrier to operate in am mode. if bit ch1mode = 0 the fm mode is assumed. this applies to both terrestrial and satellite fm reception. idmod1 idmod0 identification mode 0 0 slow 0 1 medium 1 0 fast 1 1 off/reset, recommended during use of high deviation mode ch2mod1 ch2mod0 channel 2 00fm 01am 1 0 nicam
2000 aug 04 27 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 28 filter bandwidth for channel 1 and channel 2; note 1 note 1. it is recommended to switch the fm sound mode identification off whenever the received program is not a terrestrial 2-carrier sound. switching the identification off will reset the associated hardware to a defined state. 7.3.8 fm de - emphasis register this register should not be used when applying esp. this register is used to select the proper de-emphasis characteristics as appropriate for the standard of the received carrier. bits 3 to 0 apply to sound carrier 1, bits 7 to 4 apply to sound carrier 2. in the event of a2 reception, both groups must be set to the same characteristics. the default setting after power-on reset is 0000 0000. table 29 fm de-emphasis register (subaddress 10) table 30 description of the fm de-emphasis register bits filtbw1 filtbw0 filter bandwidth filter modes channel 1 channel 2 0 0 narrow narrow recommended for nominal terrestrial broadcast conditions and sat with 2 carriers 0 1 extra wide narrow recommended for highly overmodulated single fm carriers. only channel 1 is available for fm demodulation in this mode. nicam can still be processed on channel 2. 1 0 medium medium recommended for moderately overmodulated broadcast conditions 1 1 wide wide recommended for strongly overmodulated broadcast conditions 76543210 adeem2 fmdsc23 fmdsc22 fmdsc21 adeem1 fmdsc13 fmdsc12 fmdsc11 bit symbol description 7 adeem2 adaptive de-emphasis on/off sound carrier 2: if bit adeem2 = 1 it activates the adaptive de-emphasis function (for wegener-panda 1 encoded programs), which is required for certain satellite fm channels. the standard fm de-emphasis must then be set to 75 m s. if bit adeem2 = 0 the adaptive de-emphasis is off. 6 fmdsc23 fm de-emphasis: the state of these bits determines the fm de-emphasis for sound carrier 2; see table 31. 5 fmdsc22 4 fmdsc21 3 adeem1 adaptive de-emphasis on/off sound carrier 1: if bit adeem1 = 1 it activates the adaptive de-emphasis function (for wegener-panda 1 encoded programs), which is required for certain satellite fm channels. the standard fm de-emphasis must then be set to 75 m s. if bit adeem1 = 0 the adaptive de-emphasis is off. 2 fmdsc13 fm de-emphasis: the state of these bits determines the fm de-emphasis for sound carrier 1; see table 31. 1 fmdsc12 0 fmdsc11
2000 aug 04 28 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 31 de-emphasis notes 1. the fm de-emphasis gain is 0 db at 40 hz. 2. not used in any known terrestrial tv sound standard. nicam de-emphasis is selected in the nicam configuration register; see table 39. 7.3.9 fm de m atrix r egister (fmmr) this register is used to select the proper dematrixing characteristics as appropriate for the standard of the received carrier and the related sound mode identification. for the dematrixing, it is assumed that the output from sound carrier 1 is on channel 1 input. bits 3 to 6 are not used. the default setting after power-on reset is 0000 0000. table 32 fm dematrix register (subaddress 11) table 33 description of the fm dematrix register bits fmdsc23 fmdsc22 fmdsc21 de-emphasis (1) fmdsc13 fmdsc12 fmdsc11 000 50 m s 001 60 m s 010 75 m s 011 j17 (2) 100 off 76543210 idswfm 0 0 0 0 fdms2 fdms1 fdms0 bit symbol description 7 idswfm automatic fm-dematrix switching: if set to logic 1, the fm dematrix is switched automatically in dependence on the current fm identi?cation result. in case of stereo, the type of stereo dematrixing (europe or korea) is determined by bit idarea in subaddress 9. bits fdms2, fdms1 and fdms0 are ignored and the dematrix output is set according to table 35. with channel 2 in nicam mode, mono (channel 1) is always selected. 6 - these bits are not used and should be set to logic 0 5 - 4 - 3 - 2 fdms2 dematrixing characteristics select: the state of these bits select the dematrixing characteristics; see table 34. 1 fdms1 0 fdms0
2000 aug 04 29 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 34 selection of the dematrixing characteristics (manual mode) table 35 setting of the dematrixing characteristics (automatic mode) fdms2 fdms1 fdms0 l output r output mode 0 0 0 ch1 ch1 mono 1 0 0 1 ch2 ch2 mono 2 0 1 0 ch1 ch2 dual 0 1 1 ch2 ch1 dual swapped 1 0 0 2ch1 - ch2 ch2 stereo europe 1 0 1 stereo korea - 6db 1 1 0 ch1 + ch2 ch1 - ch2 stereo korea identification mode l output r output mono ch1 ch1 stereo europe 2ch1 - ch2 ch2 korea ch1 + ch2 ch1 - ch2 dual ch1 ch2 ch1 ch2 + 2 ----------------------------- - ch1 ch2 C 2 ----------------------------- -
2000 aug 04 30 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.10 c hannel 1o utput l evel a djustment r egister (c1olar) this register is used to correct for standard and station-dependent differences of signal levels. table 36 applies to the fm dematrix output channel 1. the default setting after power-on reset is 0000 0000. table 36 channel 1 output level adjustment register (subaddress 12) the selected gain is also applied to the fm signal channel 1 for input to the mono channel. 76543210 gain setting (db) 00001111 +15 00001110 +14 00001101 +13 00001100 +12 00001011 +11 00001010 +10 00001001 +9 00001000 +8 00000111 +7 00000110 +6 00000101 +5 00000100 +4 00000011 +3 00000010 +2 00000001 +1 00000000 0 00011111 not de?ned 00011110 - 1 00011101 - 2 00011100 - 3 00011011 - 4 00011010 - 5 00011001 - 6 00011000 - 7 00010111 - 8 00010110 - 9 00010101 - 10 00010100 - 11 00010011 - 12 00010010 - 13 00010001 - 14 00010000 - 15
2000 aug 04 31 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.11 c hannel 2o utput l evel a djustment r egister (c2olar) this register is used to correct for standard and station-dependent differences of signal levels. table 37 applies to the fm dematrix output channel 2 in its fm and am modes. in the event of fm stereo or fm dual language reception, channels 1 and 2 should be adjusted to the same level. the default setting after power-on reset is 0000 0000. table 37 channel 2 output level adjustment register (subaddress 13) the gain chosen is also applied to the fm signal channel 1 for input to the mono channel. 76543210 gain setting (db) 00001111 +15 00001110 +14 00001101 +13 00001100 +12 00001011 +11 00001010 +10 00001001 +9 00001000 +8 00000111 +7 00000110 +6 00000101 +5 00000100 +4 00000011 +3 00000010 +2 00000001 +1 00000000 0 00011111 not de?ned 00011110 - 1 00011101 - 2 00011100 - 3 00011011 - 4 00011010 - 5 00011001 - 6 00011000 - 7 00010111 - 8 00010110 - 9 00010101 - 10 00010100 - 11 00010011 - 12 00010010 - 13 00010001 - 14 00010000 - 15
2000 aug 04 32 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.12 nicam c onfiguration r egister (nconr) the default setting after power-on reset is 0000 0000. table 38 nicam con?guration register (subaddress 14) table 39 description of the nicam con?guration register bits; see notes 1 to 4 notes 1. the decision of whether auto-muting is permitted will be taken by the controlling microprocessor based on information contained in the tda9874as status registers. thus, it depends on the strategy implemented in the software whether the auto-mute function is in accordance with nicam 728 ets revised for data applications or any other preference. 2. the nicam de-emphasis gain is 0 db at 40 hz. 3. the bit amsel has only an effect on the analog sound outputs (pins outl, outr and outm). with regard to the digital sound output (i 2 s-bus), the auto-mute will only switch between nicam and the first sound carrier. 4. the dcxo test mode is intended for checking the dcxo control range with the actually used pcb layout and crystal type. during normal operation, the dcxo test mode should not be used. 76543210 dcxopull dcxotest 0 douten 0 amsel ndeem amute bit symbol description 7 dcxopull dcxo frequency select: this bit selects the dcxo lower or upper test frequency during dcxo test mode. if bit dcxopull = 1 it sets the dcxo to the lower dcxo frequency. if bit dcxopull = 0 it sets the dcxo to its higher frequency. 6 dcxotest dcxo test mode enable: if bit dcxotest = 1 it enables the dcxo test mode (available only during fm mode). in this mode frequency pulling via bit dcxopull is enabled. if bit dcxotest = 0 it enables normal operation. 5 - this bit is not used and should be set to logic 0 4 douten data output enable: if bit douten = 1 it enables the output of the nicam serial data stream from the dqpsk demodulator and of the associated clock, pclk. if bit douten = 0 both outputs will be 3-stated. 3 - this bit is not used and should be set to logic 0 2 amsel auto-mute select: if bit amsel = 1 the auto-mute will switch between nicam sound and the analog mono input. this bit only has an effect when the auto-mute function is enabled and when the dac has been selected in the analog output select register (see section 7.3.18). if bit amsel = 0 the auto-mute will switch between nicam sound and the sound on the ?rst sound carrier (i.e. fm mono or am). 1 ndeem de-emphasis on/off: if bit ndeem = 1 it switches the nicam j17 de-emphasis off. if bit ndeem = 0 it switches the nicam j17 de-emphasis on. 0 amute auto-muting on/off: if bit amute = 1 automatic muting is disabled. this bit only has an effect when the second sound carrier is set to nicam. if bit amute = 0 it enables the automatic switching between nicam and the program on the ?rst sound carrier (i.e. fm mono or am), depending on the nicam bit error rate. the fm dematrix should be set to the mono position or idswfm (subaddress 11) should be set.
2000 aug 04 33 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.13 nicam o utput l evel a djustment r egister (nolar) this register is used to correct for standard and station-dependent differences of signal levels. table 40 applies to both nicam sound outputs. the default setting after power-on reset is 0000 0000. table 40 nicam output level adjustment register (subaddress 15) 76543210 gain setting (db) 00001111 +15 00001110 +14 00001101 +13 00001100 +12 00001011 +11 00001010 +10 00001001 +9 00001000 +8 00000111 +7 00000110 +6 00000101 +5 00000100 +4 00000011 +3 00000010 +2 00000001 +1 00000000 0 00011111 not de?ned 00011110 - 1 00011101 - 2 00011100 - 3 00011011 - 4 00011010 - 5 00011001 - 6 00011000 - 7 00010111 - 8 00010110 - 9 00010101 - 10 00010100 - 11 00010011 - 12 00010010 - 13 00010001 - 14 00010000 - 15
2000 aug 04 34 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.14 nicam l ower e rror l imit r egister (nlelr) when the auto-mute function is enabled (see section 7.3.12) and the nicam bit error count is lower than the value contained in this register, the nicam signal is selected (again) for reproduction; see also section 7.3.15. the default setting after power-on reset is 0001 0100. table 41 nicam lower error limit register (subaddress 16) 7.3.15 nicam u pper e rror l imit r egister (nuelr) when the auto-mute function is enabled and the nicam bit error count is higher than the value contained in this register, the signal of the first sound carrier (i.e. fm mono or am sound) or the analog mono input is selected for reproduction. the difference between the upper and lower error limit constitutes a hysteresis to avoid frequent switching between nicam and the program on the 1st sound carrier. the default setting after power-on reset is 0101 0000. table 42 nicam upper error limit register (subaddress 17) 7.3.16 a udio m ute c ontrol r egister (amconr) only bits 6, 2 and 1 are used. when any of these bits is set to logic 1, the corresponding pair of output channels will be muted. a bit set to logic 0 allows normal signal output. the unused bits should be set to logic 1 the default setting after power-on reset is 1111 1111. 76543210 b7 b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0 table 43 audio mute control register (subaddress 18) table 44 description of the audio mute control register bits 76543210 1 muti 2 s 1 1 1 mutsout mutmout 1 bit symbol description 7 - this bit is not used and should be set to logic 1 6 muti 2 s mute i 2 s-bus output: if bit muti 2 s = 1 the i 2 s-bus output is muted 5 - these bits are not used and should be set to logic 1 4 - 3 - 2 mutsout mute stereo output: if bit mutsout = 1 the analog stereo output is muted 1 mutmout mute mono output: if bit mutmout = 1 the analog mono output is muted 0 - this bit is not used and should be set to logic 1
2000 aug 04 35 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.17 s tereo dac o utput s elect r egister (sdacosr) this register is used to define the signal source to be entered into the dac. the stereo dac output can be routed to the analog stereo output pins, depending on the setting in the aosr; see section 7.3.18. a simplified setting is possible, if automatic fm dematrix switching (see section 7.3.9) and auto-select is applied. the two combinations of fm and nicam shown in table 48 apply to the (rare) condition that three different languages are being broadcast in an fm + nicam system. they allow for a two-out-of-three selection for special applications. it should be noted that the controlling microprocessor has to assure that the fm dematrix is set to the mono position or that bit idswfm is set to logic 1. an additional automatic volume level (avl) control function is implemented, which provides a constant output level of - 23 db (full-scale) for input levels between 0 and - 29 db (full-scale). there are some fixed decay time constants to choose from, i.e. 2, 4 or 8 s. the automatic stereo dac switching, operating similar to the mono dac switching, is shown in table 54. the default setting after power-on reset is 0000 0000. bits 2 and 6 are not used and should be set to logic 0. table 45 stereo dac output select register (subaddress 19) table 46 selection of stereo dac gain table 47 avl control mode the avl attack time is always 10 ms. table 48 signal source left and right the auto-select function is available only if bits sdos1 and sdos0 are set to logic 00 or 01. matrixing can be set in the analog output select register. 7.3.18 a nalog o utput s elect r egister (aosr) this register is used to define both the signal source to be output at the analog outputs and the output channel selector mode. the dac outputs are automatically muted in the event that one of the analog inputs is selected for output. the position of the matrix applies only to the dac outputs, it is not available for analog input signals. the default setting after power-on reset is 0000 0000. 765 4 321 0 sdgs1 0 avl 1 avl 0 sdgs0 0 sdos1 sdos0 sdgs1 sdgs0 dac gain (db) 00 0 01 3 10 6 11 9 avl1 avl0 avl mode 0 0 off or reset 0 1 short decay (2 s) 1 0 medium decay (4 s) 1 1 long decay (8 s) sdos1 sdos0 signal source stereo dac left right 0 0 fm/am fm/am 0 1 nicam left nicam right 1 0 fm/am nicam m1 1 1 fm/am nicam m2 lr + 2 ------------- -
2000 aug 04 36 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 49 analog output select register (subaddress 20) table 50 description of the analog output select register bits table 51 output channel selection mode for stereo output (bit tvsm = 0) table 52 signal source selection analog mono output table 53 signal source selection stereo output 76543210 tvsm csm2 csm1 csm0 mos1 mos0 sss1 sss0 bit symbol description 7 tvsm auto-select function: for tv applications, only in combination with bit idswfm = 1. if set to logic 1, it switches the matrix automatically depending on bits idste and iddua for fm and the bits s/mb, d/sb for nicam (see sections 7.4.1 and 7.4.2). 6 csm2 output channel selection mode, stereo output: these bits select the output channel selection mode; see table 51 5 csm1 4 csm0 3 mos1 signal source for mono output: these bits select the signal source for the mono output; see table 52 2 mos0 1 sss1 signal source for stereo output: these bits select the signal source for the stereo output; see table 53 0 sss0 csm2 csm1 csm0 l output r output remark 0 0 0 l input r input - 0 0 1 l input l input - 0 1 0 r input r input - 0 1 1 r input l input - 1 0 0 not allowed during use of high deviation mode mos1 mos0 signal source 0 0 mono dac 0 1 external input l 1 0 external input r 1 1 mono input sss1 sss0 signal source 00dac 0 1 reserved 1 0 external input 1 1 mono input l input r input + 2 ------------------------------------------ - l input r input + 2 ------------------------------------------ -
2000 aug 04 37 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 54 auto-select function (bit tvsm = 1 and bit idswfm = 1): fm mode/nicam mode for stereo dac note 1. x = dont care. signal source selection bits sdos1 and sdos0 must be set to logic 0x for fm mode (including fm mode by switching if auto-mute select is set to logic 0) or to logic 01 for nicam mode, when using the auto-select function. 7.3.19 d igital a udio i nterface c onfiguration r egister (daiconr) the default setting after power-on reset is 0000 0000. table 55 digital audio interface con?guration register (subaddress 21) table 56 description of the digital audio interface con?guration register bits output channel selection mode fm ident/nicam sound mode auto-mute = high; ch2mod = 10 csm2 csm1 csm0 mono stereo dual 00x (1) m/m l/r a/a fm/am: m/m 0 1 0 m/m l/r b/b fm/am: m/m 76543210 0 0 0 syscl1 syscl0 sysout i2sform i2sout bit symbol description 7 - these bits are not used and should be set to logic 0 6 - 5 - 4 syscl1 system clock frequency select: these bits select the frequency of the system clock; see table 57. 3 syscl0 2 sysout system clock output on/off: if bit sysout = 1 it enables the output of a system (or master) clock signal at pin sysclk. if bit sysout = 0 the output will be off, thereby improving emc performance. 1 i2sform serial output format: if bit i2sform = 1 it selects an msb-aligned, msb-?rst output format, i.e. a level change at the word select pin indicates the beginning of a new audio sample. if bit i2sform = 0 it selects the standard i 2 s-bus output format. 0 i2sout i 2 s-bus output on/off: if bit i2sout = 1 it enables the output of serial audio data (2 pins) plus serial bit clock and word select in a format determined by the bit i2sform. the tda9874a then is an i 2 s-bus master. if bit i2sout = 0 the outputs mentioned will be 3-stated, thereby improving emc performance.
2000 aug 04 38 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 57 system clock frequency select syscl1 syscl0 sysclk output frequency (mhz) 0 0 256f s 8.192 0 1 384f s 12.288 1 0 512f s 16.384 1 1 768f s 24.576 7.3.20 i 2 s- bus o utput s elect r egister (i 2 sosr) this register is used to define both the signal source to be output at the i 2 s-bus port and the mode of the digital matrix for signal selection. the two combinations of fm and nicam shown in table 60 apply to the (rare) condition that three different languages are being broadcast in an fm + nicam system. they allow for a two-out-of-three selection for special applications. it should be noted that the controlling microprocessor has to assure that the fm dematrix is set to the mono position or bit idswfm is set to logic 1. if the i 2 s-bus signal source is set to fm left or fm right it is influenced by the automatic fm dematrix switching (see subaddress 11). the default setting after power-on reset is 0000 0000. table 58 i 2 s-bus output select register (subaddress 22) table 59 description of the i 2 s-bus output select register bits table 60 mode of the digital matrix for signal selection (bit tvsmiis = 0) 76543210 tvsmiis icsm2 icsm1 icsm0 0 0 iss1 iss0 bit symbol description 7 tvsmiis auto-select function : for tv applications, only in combination with bit idswfm = 1. if this bit is set to logic 1 it switches the matrix automatically, depending on the bits idste and iddua for fm and the bits s/mb, d/sb for nicam in transmitters subaddresses 0 and 1 (see sections 7.4.1 and 7.4.2). 6 icsm2 output channel selection mode: these bits select the output channel selection mode; see table 60. 5 icsm1 4 icsm0 3 - these bits are not used and should be set to logic 0 2 - 1 iss1 signal source: these bits select the signal source; see table 60. 0 iss0 icsm2 icsm1 icsm0 l output r output remark 0 0 0 l input r input - 0 0 1 l input l input - 0 1 0 r input r input - 0 1 1 r input l input - 1 0 0 not allowed during use of high deviation mode l input r input + 2 ------------------------------------------ - l input r input + 2 ------------------------------------------ -
2000 aug 04 39 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a table 61 signal source left and right; note 1 note 1. the auto-select function is available only if bits iss1 and iss0 are set to logic 00 or 01. table 62 auto-select function (bit tvsmiis = 1 and bit idswfm = 1): fm mode/nicam mode for i 2 s-bus output note 1. x = dont care. iss1 iss0 signal source i 2 s-bus output left right 0 0 fm/am left fm/am right 0 1 nicam left nicam right 1 0 fm/am nicam m1 1 1 fm/am nicam m2 i 2 s-bus output fm ident/nicam sound mode auto-mute = high; ch2mod = 10 icsm2 icsm1 icsm0 mono stereo dual 00x (1) m/m l/r a/a fm/am: m/m 0 1 0 m/m l/r b/b fm/am: m/m
2000 aug 04 40 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.21 i 2 s- bus o utput l evel a djustment r egister (i 2 solar) this register is used to adjust the output level at the i 2 s-bus port. left and right signal channels are treated identically. the default setting after power-on reset is 0000 0000. table 63 i 2 s-bus output level adjustment register (subaddress 23) 76543210 gain setting (db) 00001111 +15 00001110 +14 00001101 +13 00001100 +12 00001011 +11 00001010 +10 00001001 +9 00001000 +8 00000111 +7 00000110 +6 00000101 +5 00000100 +4 00000011 +3 00000010 +2 00000001 +1 00000000 0 00011111 not de?ned 00011110 - 1 00011101 - 2 00011100 - 3 00011011 - 4 00011010 - 5 00011001 - 6 00011000 - 7 00010111 - 8 00010110 - 9 00010101 - 10 00010100 - 11 00010011 - 12 00010010 - 13 00010001 - 14 00010000 - 15
2000 aug 04 41 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.22 m ono dac o utput s elect r egister (mdacosr) this register is used to define the signal source to be entered into the mono dac. the mono dac is used for signal output from digital sources. for the mono dac output auto-matrix switching is always active. in stereo mode is chosen automatically. selecting language b (bits mdos1 and mdos0 set to logic 01 or 11) will only show effect, while a dual transmission via fm a2 or nicam is being received. settings in the fm dematrix register have no effect on the source selection for the mono dac. the level adjustment for an fm source is determined by the channel 1 output level adjustment register (subaddress 12) for mono/dual a, or by the channel 2 output level adjustment register (subaddress 13) for dual b, or by the nicam output level adjustment register (subaddress 15) if a nicam source is selected. some extra gain can be introduced at the input to the dac to provide a coarse level adjustment function. the default setting after power-on reset is 0000 0000. bits 2, 4, 5 and 6 are dont care and should be set to logic 0. lr + 2 ------------- - table 64 mono dac output select register (subaddress 24) table 65 selection of dac gain table 66 signal source 76543210 mdgs1 0 0 0 mdgs0 0 mdos1 mdos0 mdgs1 mdgs0 dac gain (db) 00 0 01 3 10 6 11 9 mdos1 mdos0 mono dac output 00 fm/am or mono/dual a 0 1 fm/am dual b if dual mode transmission, otherwise mono 10 nicam or mono/dual a 1 1 nicam mono 2 if dual mode transmission, otherwise mono lr + 2 ------------- - lr + 2 ------------- -
2000 aug 04 42 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.3.23 e asy s tandard p rogramming (esp) register this register is used to simplify the setting of different tv sound standards via the i 2 c-bus. writing to this register will overwrite the contents of registers 3 to 10 with the settings needed to demodulate one of the standards shown in table 68. after power-up, the default setting has no effect on the settings of registers 3 to 10. old values of registers 3 to 10 are not stored. demodulators filter the bandwidth and identification time constants are also set independently from the chosen standard selected in this register. this means for i 2 c-bus refreshing: using the esp option, registers 3 to 10 should not be overwritten during a refresh. if esp is not used, the esp register should not be accessed in the refresh routine. demodulators filter bandwidth and identification time constants are also set independently in this register. the default setting after power-on reset is 0000 0000. for a description of the bits idmod0 and idmod1 (fm identification mode), filtbw0 and filtbw1 (demodulator filter bandwidth) refer to section 7.3.7. bits idmod0 and idmod1 (fm identification mode), filtbw0 and filtbw1 (demodulator filter bandwidth) are identical in registers 255 and 9. table 67 easy standard programming register (subaddress 255) table 68 available standards for easy standard programming 76543210 filtbw1 filtbw0 idmod1 idmod0 epb3 epb2 epb1 epb0 epb3 epb2 epb1 epb0 standard number name 0 0 0 0 0 a2, b/g 0 0 0 1 1 a2, m (korea) 0 0 1 0 2 a2, d/k (1) 0 0 1 1 3 a2, d/k (2) 0 1 0 0 4 a2, d/k (3) 0 1 0 1 5 nicam, i 0 1 1 0 6 nicam, b/g 0 1 1 1 7 nicam, d/k 1 0 0 0 8 nicam, l 1 0 0 1 9 reserved 1 0 1 0 10 reserved 1 0 1 1 11 reserved 1 1 0 0 12 astra satellite stereo (7.02/7.20 mhz) 1 1 0 1 13 reserved 1 1 1 0 14 reserved 1 1 1 1 15 reserved
2000 aug 04 43 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.4 slave transmitter mode as a slave transmitter, the tda9874a provides 12 registers with status information and data, a part of which is for philips internal purposes only. each register is accessed by means of a subaddress. detailed descriptions of the slave transmitter registers are given in sections 7.4.1 to 7.4.9. reading of data can start at any valid subaddress. it is allowed to read more than 1 data byte per transmission from the tda9874a. in this case, the subaddress is automatically incremented after each data byte, resulting in reading the sequence of data bytes from successive register locations, starting at subaddress. each data byte in a read sequence, except for the last one, is acknowledged with am. the subaddresses wrap around from decimal 255 to 0. if an attempt is made to read from a non-existing subaddress, the device will send a data pattern of all ones, i.e. ff in hexadecimal notation. table 69 general format for reading data from the tda9874a table 70 explanation of tables 69 and 71 table 71 format of a transmission using automatic incrementing of subaddresses note 1. n data bytes with auto-increment of subaddresses. s slave address 0 a subaddress a sr slave address 1 a data nam p bit function s start condition slave address 7-bit device address 0 data direction bit (write to device) a acknowledge (by the slave) subaddress address of register to read from sr repeated start condition 1 data direction bit (read from device) data data byte read from register nam not acknowledge (by the master) am acknowledge (by the master) p stop condition s slave address 0 a subaddress a sr slave address 1 a data byte am (1) data nam p
2000 aug 04 44 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... table 72 overview of the slave transmitter registers note 1. registers from subaddress 252 to 255 are for philips internal purposes only. they are considered as a set of registers for the identification of individual members and some key parameters in a family of devices. subaddress (decimal) (1) data function 76543210 0 p2in p1in rssf amstat vdsp iddua idste pfr device status (identi?cation, etc.) 1 c4 c3 c2 c1 osb cfc s/mb d/sb nicam status 2 b7 b6 b5 b4 b3 b2 b1 b0 nicam error count 3 ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0 additional data (lsb) 4 ovw sad - ci1 ci2 ad10 ad9 ad8 additional data (msb) 5 b7 b6 b5 b4 b3 b2 b1 b0 level read-out (msb) 6 b7 b6 b5 b4 b3 b2 b1 b0 level read-out (lsb) 7 idpilot -- b4 b3 b2 b1 b0 sif level 252 b7 b6 b5 b4 b3 b2 b1 b0 test register 2 253 b7 b6 b5 b4 b3 b2 b1 b0 test register 1 254 b7 b6 b5 b4 b3 b2 b1 b0 device identi?cation code 255 b7 b6 b5 b4 b3 b2 b1 b0 software identi?cation code
2000 aug 04 45 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.4.1 d evice s tatus r egister (dsr) table 73 device status register (subaddress 0) table 74 description of the device status register bits 76543210 p2in p1in rssf amstat vdsp iddua idste pfr bit symbol description 7 p2in input from port 2: this bit re?ects the status of the general purpose port pin p2; see section 7.3.3. if bit p2in = 1 the general purpose port pin p2 is at high level. if bit p2in = 0 the general purpose port pin p2 is at low level. 6 p1in input from port 1: this bit re?ects the status of the general purpose port pin p1; see section 7.3.3. if bit p1in = 1 then the general purpose port pin p1 is at high level. if bit p1in = 0 the general purpose port pin p1 is at low level. 5 rssf reserve sound switching ?ag: if bit rssf = 1 it is a copy of bit c4 in the nicam status register (see section 7.4.2). it indicates that the fm (or am for standard l) sound matches the digital transmission and auto-muting should be enabled. if bit rssf = 0 auto-muting should be disabled, as analog and digital sound are different. 4 amstat auto-mute status: if bit amstat = 1 it indicates that the auto-muting function has switched from nicam to the program of the ?rst sound carrier (i.e. fm mono or am in nicam l systems). 3 vdsp identi?cation of nicam sound: if bit vdsp = 1 it indicates that digital transmission is a sound source. if bit vdsp = 0 it indicates that the transmission is either data or a currently unde?ned format. 2 iddua identi?cation of fm dual sound; a2 systems: if bit iddua = 1 an fm dual-language signal has been identi?ed. when neither bit idste = 1 nor bit iddua = 1 the received signal is assumed to be fm mono (a2 systems only). 1 idste identi?cation of fm stereo; a2 systems: if bit idste = 1 an fm stereo signal has been identi?ed (a2 systems only). 0 pfr power failure register: the power supply for the digital part of the device (v ddd1 ) has temporarily been lower than the speci?ed lower limit. if this is detected an initialization of the device has to be carried out to ensure reliable operation.
2000 aug 04 46 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.4.2 nicam s tatus r egister (nsr) table 75 nicam status register (subaddress 1) table 76 description of the nicam status register bits; notes 1 and 2 notes 1. the tda9874a does not support the extended control modes. therefore, the program of the first sound carrier (i.e. fm mono or am) is selected for reproduction in case bit c3 is set to logic 1, independent of bit amute in the nicam configuration register being set or not. 2. when a nicam transmitter is switched off, the device will lose synchronization. in that case the program of the first sound carrier is selected for reproduction, independent of bit amute being set or not. 7.4.3 nicam e rror c ount r egister (necr) bits b7 to b0 contain the number of errors occurring in the previous 128 ms period. the register is updated every 128 ms. table 77 nicam error count register (subaddress 2) 76543210 c4 c3 c2 c1 osb cfc s/mb d/sb bit symbol description 7 c4 nicam application control bits: these bits correspond to the control bits c1 to c4 in the nicam transmission. 6c3 5c2 4c1 3 osb synchronization bit: if bit osb = 1 it indicates that the device has both frame and c0 (16 frame) synchronization. if bit osb = 0 it indicates that the audio output from the nicam part is digital silence. 2 cfc con?guration change: if bit cfc = 1 it indicates a con?guration change at the 16 frame (c0) boundary. 1 s/mb identi?cation of nicam stereo: if bit s/mb = 1 it indicates stereo mode. 0 d/sb identi?cation of nicam dual mono: if bit d/sb = 1 it indicates dual mono mode. 76543210 b7 b6 b5 b4 b3 b2 b1 b0
2000 aug 04 47 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.4.4 d ata registers dr1 and dr2 the contents of these two registers provide information on the additional data bits. ad byte 0 is stored at subaddress 3. table 78 data register dr1 (subaddress 3) table 79 description of the data register dr1 bits table 80 data register dr2 (subaddress 4) table 81 description of the data register dr2 bits 76543210 ad7 ad6 ad5 ad4 ad3 ad2 ad1 ad0 bit symbol description 7 ad7 the lower 8 bits of the additional data word 6 ad6 5 ad5 4 ad4 3 ad3 2 ad2 1 ad1 0 ad0 76543210 ovw sad - ci1 ci2 ad10 ad9 ad8 bit symbol description 7 ovw if this bit is logic 1 new additional data bits are written to the ic without the previous bits being read. 6 sad if bit sad = 1 new additional data is written into the ic. this bit is reset when the additional data bits are read. 5 - this bit is unde?ned 4 ci1 these bits are ci bits decoded by majority logic from the parity checks of the last ten samples in a frame. 3 ci2 2 ad10 the upper 3 bits of the additional data word 1 ad9 0 ad8
2000 aug 04 48 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.4.5 l evel r ead - out r egisters (lrra and lrrb) these two bytes constitute a word that provides data from a location that has been specified with the monitor select register (see section 7.3.4). the most significant byte of the data is stored at subaddress 5. table 82 level read-out register a (subaddress 5) note 1. b7 is the most significant bit or sign bit of the word. table 83 level read-out register b (subaddress 6) note 1. b0 is the least significant bit of the word. 7.4.6 sif l evel r egister (siflr) when the sif agc is on, bits b4 to b0 of this register contain a number that gives an indication of the sif input level. that number can be interpreted in the same way as the agc gain register setting (see section 7.3.2), i.e. if the sif agc were set to a fixed gain and the same number loaded into the agc gain register, the current sif input signal level would generate a sif adc output close to full-scale. when the sif agc is off, this register returns the contents of the agc gain register. bits b5 and b6 are dont care. table 84 sif level register (subaddress 7) table 85 description of the sif level register bits note 1. the pilot detector is faster than the stereo/dual identification, but not as reliable and slightly less sensitive. by means of the pilot detector bit, the control software is able to identify an analog 2-carrier (a2) standard transmission within approximately 0.1 s and even in the event of a mono transmission (second sound carrier with pilot). certain nicam test signals may trigger a wrong pilot indication, therefore the pilot detector bit should not be evaluated at channel 2 mixer frequencies that correspond to nicam carriers (5.85 and 6.552 mhz). for detailed information, please contact a philips representative. 76543210 b7 (1) b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0 (1) 7 6543210 idpilot -- b4 b3 b2 b1 b0 bit symbol description 7 idpilot bit idpilot: if this bit is logic 1 it indicates that an fm pilot carrier in the 2nd channel is detected; note 1 6 - this bit is unde?ned 5 - this bit is unde?ned 4 b4 sif level data bits: these bits correspond to the input level at the selected sif input 3b3 2b2 1b1 0b0
2000 aug 04 49 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 7.4.7 t est r egister 2 (tr2) this register contains, as a binary number, the highest subaddress used for slave receiver registers. the first version will have the identification 0010 1101. table 86 test register 2 (subaddress 252) 7.4.8 t est r egister 1 (tr1) this register contains, as a binary number, the highest subaddress used for slave transmitter (status) registers. the first version will have the identification 0000 0111. table 87 test register 1 (subaddress 253) 7.4.9 d evice i dentification c ode (dic) there will be several devices in the digital tv sound processor family, with tda9874a being the second member. this byte is used to identify the individual family members. the first version will have the identification 0001 0001. table 88 device identi?cation code (subaddress 254) 7.4.10 s oftware i dentification c ode (sic) it is likely that during the life time of this family of devices several versions of the dsp software will be made, e.g. to incorporate new application concepts, respond to customer wishes, etc. this byte is used to identify the different releases. the first version will have the identification 0000 0010. table 89 software identi?cation code (subaddress 255) 8i 2 s-bus description the digital audio interface of the tda9874a consists of a serial audio output and associated clock signals. it can be used to supply digital audio signals from received tv programs to a suitable output device, e.g. a dac or an aes/ebu transmitter. two serial audio formats are supported at the digital audio interface, the i 2 s-bus format and a very similar msb-aligned format. the difference is illustrated in fig.8. in both formats the left audio channel of a stereo sample pair is output first, and is on the serial data line (sdo) when the word select line (ws) is at low level. data is written on the trailing edge of sck and read on the leading edge of sck. the most significant bit is sent first. after power-on reset, the outputs of the digital audio interface are 3-stated to reduce emc and allow for combinations with other ics. if an output is desired, it has to be activated by means of an i 2 c-bus command. when the output is enabled, serial audio data can be taken from pin sdo. depending on the signal source, switch and matrix positions, the output can be either mono, stereo or dual language. the word select output (ws) is clocked with the audio sample frequency of 32 khz. the serial clock output (sck) is clocked at a frequency of 2.048 mhz. this means that there are 64 clock pulses per pair of stereo output samples, or 32 clock pulses per sample. there are 18 significant bits used on the serial data output (sdo). a symmetrical system clock output (sysclk) is available from the tda9874a as a master clock for external digital audio devices. after power-on reset, the clock is off. it can be enabled and the output frequency set via an i 2 c-bus command. available output frequencies are 8.192, 12.288, 16.384 and 24.576 mhz. 76543210 b7 b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0 76543210 b7 b6 b5 b4 b3 b2 b1 b0
2000 aug 04 50 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a handbook, full pagewidth mgk759 one sample sck ws sdo lsb msb lsb msb handbook, full pagewidth mgk758 one sample sck ws sdo lsb msb lsb msb fig.8 serial audio interface formats. a. i 2 s-bus format. b. msb-aligned format.
2000 aug 04 51 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 9 limiting values in accordance with the absolute maximum rating system (iec 60134). notes 1. human body model: c = 100 pf and r = 1.5 k w . 2. machine model: c = 200 pf, l = 0.75 m h and r = 0 w . 10 thermal characteristics symbol parameter conditions min. max. unit v ddx dc supply voltage - 0.5 +6.5 v d v ddx voltage differences between two v ddx pins - 550 mv i ik dc input clamp diode current v i < - 0.5 v or v i >v dd + 0.5 v - 10 ma i ok dc output clamp diode current output type 4 ma v o < - 0.5 v or v o >v dd + 0.5 v - 20 ma i o dc output source or sink current; output type 4 ma - 0.5v 2000 aug 04 52 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 11 characteristics v dd =5v; t amb =25 c; settings in accordance with b/g standard; fm deviation 50 khz; f mod = 1 khz; fm sound parameters in accordance with system a2; nicam in accordance with ebu nicam 728 speci?cation ; 1k w measurement source resistance for af inputs; v sif = 300 mv (p-p); bit agcoff = 0; bit agcslow = 1; level and gain settings according to note 1 with external components of fig.9; unless otherwise speci?ed. symbol parameter conditions min. typ. max. unit digital supplies v ddd1 digital supply voltage 1 4.5 5.0 5.5 v v ssd1 digital ground supply 1 - 0.0 - v i ddd1 digital supply current 1 v ddd1 =5.5v 4059 74ma v ddd1 =5.0v 4259 75ma v ssd2 digital ground supply 2 - 0.0 - v v ddd3 digital supply voltage 3 4.5 5.0 5.5 v v ssd3 digital ground supply 3 - 0.0 - v i ddd3 digital supply current 3 v ddd3 = 5.5 v; sysclk off 9 17 21 ma v ddd3 = 5.0 v; sysclk off 8 16 20 ma power failure register v pfr power failure response voltage - 4.0 - v demodulator supplies and references v dda3 analog supply voltage 3 for demodulator part 4.5 5.0 5.5 v v ssa3 analog ground supply 3 for demodulator part - 0.0 - v i dda3 analog supply current 3 for demodulator part v dda3 =5.5v 2432 40ma v dda3 =5.0v 2432 40ma v dec1 analog supply decoupling voltage for front-end - 3.3 - v v ssa2 analog ground supply 2 - 0.0 - v v ref1 analog reference voltage for demodulator part - 2 - v i ref1(sink) sink current at pin v ref1 - 200 -m a audio supplies and references v dda1 analog supply voltage 1 for operational ampli?ers 4.5 5.0 5.5 v v ssa1 analog ground supply 1 for operational ampli?ers - 0.0 - v i dda1 analog supply current 1 for operational ampli?ers v dda1 = 5.5 v 3 6 10 ma v dda1 = 5.0 v 3 5 10 ma v ssa4 analog ground supply 4 for audio dac part - 0.0 - v v ref2 reference voltage 2 for audio dacs and operational ampli?ers referenced to v dda1 and v ssa1 - 50 - %
2000 aug 04 53 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a z (vref2-vdda3) impedance between pins v ref2 and v dda3 - 20 - k w z (vref2-vssa3) impedance between pins v ref2 and v ssa3 - 20 - k w digital inputs and outputs i nputs cmos level input, high drive, pull-down (pins test1, test2, tp1 and tp2) v il low-level input voltage -- 0.3v ddd v v ih high-level input voltage 0.7v ddd -- v c i input capacitance -- 10 pf z i input impedance - 50 - k w cmos level input, hysteresis, high drive, pull-up (pin creset) v il low-level input voltage -- 0.3v ddd v v ih high-level input voltage 0.7v ddd -- v v hys hysteresis voltage - 1.3 - v c i input capacitance -- 10 pf z i input impedance - 50 - k w i nputs / outputs i 2 c-bus level input with schmitt trigger, open-drain output stage (pins scl and sda) v il low-level input voltage -- 0.3v ddd v v ih high-level input voltage 0.7v ddd -- v v hys hysteresis voltage - 0.05v ddd - v i li input leakage current -- 10 m a c i input capacitance -- 10 pf v ol low-level output voltage -- 0.6 v c l load capacitance -- 400 pf ttl/cmos level, high drive, 4 ma 3-state output stage, pull-up (pins pclk, nicam, addr1, addr2, p1, p2, sck, ws and sdo) v il low-level input voltage -- 0.8 v v ih high-level input voltage 2.0 -- v c i input capacitance -- 10 pf v ol low-level output voltage i ol =3ma -- 0.4 v v oh high-level output voltage i oh = - 3 ma 2.4 -- v c l load capacitance active pull-up -- 100 pf z i input impedance - 50 - k w o utputs 4 ma 3-state output stage (pin sysclk) v ol low-level output voltage i ol =2ma -- 0.3v ddd v v oh high-level output voltage i oh = - 2 ma 0.7v ddd -- v symbol parameter conditions min. typ. max. unit
2000 aug 04 54 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a c l load capacitance -- 100 pf i loz 3-state leakage current v i = 0 to v ddd -- 10 m a sif1 and sif2 analog inputs v sif(max)(p-p) maximum composite sif input voltage before clipping (peak-to-peak value) sif input level adjustment 0db - 941 - mv sif input level adjustment - 10 db - 2976 - mv v sif(min)(p-p) minimum composite sif input voltage for lower limit of agc (peak-to-peak value) sif input level adjustment 0db - 59 - mv sif input level adjustment - 10 db - 188 - mv agc agc range - 24 - db f i input frequency 4 - 9.2 mhz r i input resistance agclev = 0 10 -- k w c i input capacitance - 7.5 11 pf d f fm fm deviation b/g standard; thd < 1% 100 -- khz d f fm(fs) fm deviation full-scale level terrestrial fm; level adjustment 0 db; demodulator ?lter bandwidth set to narrow 150 -- khz d f fm(max) maximum fm deviation in high deviation mode b/g standard; thd < 1%; demodulator ?lter bandwidth set to extra wide 335 -- khz c/n fm fm carrier-to-noise ratio n fm bandwidth = 6 mhz; white noise for s/n = 40 db; ccir468-2 ; quasi peak - 77 - c/n n nicam carrier-to-noise ratio n n bandwidth = 6 mhz; bit error rate = 10 - 3 ; white noise - 66 - a ct crosstalk attenuation sif1 to sif2 f i = 4 to 9.2 mhz 50 -- db demodulator performance v o(nom)(rms) nominal level output voltage (rms value) note 1 400 500 600 mv thd + n total harmonic distortion plus noise from fm source to any output; f i = 1 khz; bandwidth 20 hz to 20 khz; v o = 1 v (rms) - 0.3 0.5 % from nicam source to any output; f i = 1 khz; bandwidth 20 hz to 20 khz; v o = 1 v (rms) - 0.1 0.3 % symbol parameter conditions min. typ. max. unit db hz ------ - db hz ------ -
2000 aug 04 55 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a s/n signal-to-noise ratio sc1 from fm source to any output; v o = 1 v (rms); ccir468-2 ; quasi peak 64 70 - db sc2 from fm source to any output; v o = 1 v (rms); ccir468-2 ; quasi peak 60 66 - db sc1 during use of high deviation mode from fm source to any output; v o = 1 v (rms); ccir468-2 ; quasi peak 62 68 - db nicam source; v o = 1 v (rms); ccir468-2 ; quasi peak nicam in accordance with ebu speci?cation ; note 2 b - 3db - 3 db bandwidth from fm source to any output 14.5 15 - khz from nicam source to any output 14.5 15 - khz f res frequency response 20 hz to 14 khz from fm/nicam to any output; reference 1 khz - 2 - +1 db a cs(dual) dual signal channel separation note 3 65 70 - db a cs(stereo) stereo channel separation note 4 40 45 - db a am am suppression for fm am: 1 khz, 30% modulation; reference: f i = 1 khz; 50 khz deviation 50 -- db dm am am demodulation sif level 100 mv (rms); 54% am; 1 khz af; ccir468-2 ; quasi peak 36 45 - db i dentification for fm systems mod p pilot modulation for identi?cation 25 50 75 % c/n p pilot sideband carrier-to-noise ratio for identi?cation start - 27 - hys (tun) hysteresis -- 2db f ident identi?cation window b/g stereo slow mode 116.85 - 118.12 hz medium mode 116.11 - 118.89 hz fast mode 114.65 - 120.46 hz b/g dual slow mode 273.44 - 274.81 hz medium mode 272.07 - 276.20 hz fast mode 270.73 - 277.60 hz t ident(on) total identi?cation time on slow mode -- 2s medium mode -- 1s fast mode -- 0.5 s symbol parameter conditions min. typ. max. unit db hz ------ -
2000 aug 04 56 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a t ident(off) total identi?cation time off slow mode -- 2s medium mode -- 1s fast mode -- 0.5 s mono and external inputs v i(nom)(rms) nominal level input voltage (rms value) note 1 - 500 - mv v i(clip)(rms) clipping level input voltage (rms value) thd < 3%; note 5 1250 1400 - mv r i input resistance note 5 28 35 42 k w analog audio outputs v o(clip)(rms) clipping level output voltage (rms value) thd < 3% 1400 -- mv r o output resistance 150 250 375 w r l(ac) ac load resistor 10 -- k w r l(dc) dc load resistor 10 -- k w c l output load capacitor - 10 12 nf v offset(dc) static dc offset voltage - 30 70 mv a mute mute suppression nominal input signal from any source; f i = 1 khz; note 1 80 -- db b line bandwidth from external and mono source; - 3 db bandwidth 20 -- khz g ro roll-off gain at 14.5 khz from any source - 3 - 2 - db psrr power supply ripple rejection f ripple = 70 hz; v ripple = 100 mv (peak); c vref =47 m f; signal from i 2 s-bus 40 45 - db audio performance thd + n total harmonic distortion plus noise v i =v o = 1 v (rms); f i = 1 khz; bandwidth 20 hz to 20 khz; from external or mono input to output copy - 0.1 0.3 % s/n signal-to-noise ratio reference voltage v o = 1.4 v (rms); f i = 1 khz; ccir468-2 ; quasi peak; from external or mono input to output copy 78 90 - db a ct crosstalk attenuation between any analog input pairs; f i = 1 khz 70 -- db a cs channel separation between left and right of external input pair 65 -- db between left and right of output pair 60 -- db symbol parameter conditions min. typ. max. unit
2000 aug 04 57 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a notes 1. definition of levels and level setting: a) the full-scale level for analog audio signals is 1.4 v (rms). b) the nominal level at the digital crossbar switch is defined at - 15 db (full-scale). c) nominal audio input levels: external, mono: 500 mv (rms); - 9 db (full-scale). 2. audio performance is limited by the dynamic range of the nicam 728 system. due to companding, the quantization noise is never lower than - 62 db with respect to the input level. 3. fm source; in dual mode only a (respectively b) signal modulated; measured at b (respectively a) channel output; v o = 1 v (rms) of modulated channel. 4. fm source; in stereo mode only l (respectively r) signal modulated; measured at r (respectively l) channel output; v o = 1 v (rms) of modulated channel. 5. if the supply voltage for the tda9874a is switched off, because of the esd protection circuitry, all audio input pins are short-circuited. 6. the philips crystal (order number 9922 520 20106) is suitable for this application. crystal speci?cation (fundamental mode) f xtal crystal frequency note 6 - 24.576 - mhz c l load capacitance - 20 - pf c 1 series capacitance - 20 - ff c 0 parallel capacitance -- 7pf f pull pulling sensitivity c l changed from 18 to 16 pf - 25 - r r equivalent series resistance at nominal frequency -- 30 w r n equivalent series resistance of unwanted mode 2r r --w d t temperature range - 20 +25 +70 c x j adjustment tolerance -- 30 10 - 6 x d drift across temperature range -- 30 10 - 6 x a ageing -- 5 symbol parameter conditions min. typ. max. unit 10 6 C pf ----------- 10 6 C year -----------
2000 aug 04 58 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a this text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader .this text is here in _ white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader.this text is here inthis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the acrobat reader. white to force landscape pages to be ... table 90 level setting fm, am and nicam at 0 db (full-scale) = 1.4 v (rms) table 91 level setting sat fm at 0 db (full-scale) = 1.4 v (rms) source transmitter nominal modulation depth nominal level at demodulator output level adjustment setting nominal level at crossbar dac gain setting nominal output voltage v o fm m standard 15 khz deviation - 24 db (full-scale) +9 db - 15 db (full-scale) (spread of 0.5 db due to different transmitter references) +6 db 500 mv (rms) fm b/g, d/k, i standard 27 khz deviation - 19 db (full-scale) +4 db am l/l accent standard 54% - 19 db (full-scale) +4 db nicam b/g, d/k, l standard - 11.2 db (full-scale) - 18 db (full-scale) +3 db nicam i standard - 15.8 db (full-scale) - 23 db (full-scale) +8 db source transmitter maximum modulation depth nominal level at demodulator output level adjustment setting maximum level at crossbar dac gain setting maximum output voltage v o sat fm stereo 50 khz deviation - 13 db (full-scale) +4 db - 9 db (full-scale) +6 db 1 v (rms) sat fm mono 85 khz deviation - 9 db (full-scale) 0 db
2000 aug 04 59 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 12 application diagrams handbook, full pagewidth 37 36 35 34 33 32 31 30 29 28 27 tda9874aps sck ws sdo sda v dda3 v ssa3 creset sif1 v ref1 sif2 scl 40 39 38 v ssd3 v ddd3 sysclk 42 41 6 7 8 9 10 11 12 13 14 15 16 3 4 5 1 2 monoin p1 470 nf 5 v i 2 s-bus i 2 c-bus 1 m f 47 pf 100 nf 47 pf 26 25 24 23 22 17 18 19 20 21 test1 v dec v ssa2 addr2 i ref 10 w 50 w 50 w 5 v 3.3 w lx (2) 470 nf 470 nf (1) 8.2 k w decoupling capacitor 470 nf outl outm outr v dda1 v ssa1 v ssd1 v ddd1 tp2 tp1 v ssd2 nicam 470 nf 5 v 5 v lx (2) 10 w 10 nf 10 nf 470 nf v ssa4 10 nf 2.2 m f 2.2 m f 2.2 m f (1) (1) test2 (1) addr1 xtali xtalo pclk 24.576 mhz p2 v ref2 extil extir 47 m f 470 nf 470 nf mhb591 fig.9 application diagram (sdip42 version). all analog and digital supply ground pins are connected internally and should be connected via a massive external ground plate. (1) tp1, tp2, test1 and test2 should be connected to v ssd during normal operation. (2) lx: ferrite bead, e.g. murata type blm 31a601s.
2000 aug 04 60 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a handbook, full pagewidth mhb592 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 44 43 42 41 40 39 38 37 36 35 34 12 13 14 15 16 17 18 19 20 21 22 tda9874ah sck ws sdo sda v dda3 v ssa3 creset sif1 v ref1 sif2 outl outr v dda1 v ssa1 v ssd1 v ddd1 n.c. tp2 tp1 scl p2 v ref2 extil extir outm monoin v ssd3 v ddd3 sysclk v ssa4 p1 addr1 tp3 xtali xtalo test2 i ref v ssa2 v dec test1 pclk addr2 v ssd2 nicam 470 nf 5 v 3.3 w 470 nf 5 v 470 nf 5 v 5 v lx (2) lx (2) 10 w 47 m f 2.2 m f 470 nf 470 nf 470 nf external input i 2 s-bus i 2 c-bus 1 m f 47 pf 10 nf 10 nf 470 nf 2.2 m f 2.2 m f 100 nf 47 pf (1) (1) 8.2 k w 470 nf decoupling capacitor (1) (1) (1) 24.576 mhz 10 w 50 w 50 w fig.10 application diagram (qfp44 version). all analog and digital supply ground pins are connected internally and should be connected via a massive external ground plate. (1) tp1, tp2, tp3, test1 and test2 should be connected to v ssd during normal operation. (2) lx: ferrite bead, e.g. murata type blm 31a601s.
2000 aug 04 61 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 13 package outlines unit b 1 cee m h l references outline version european projection issue date iec jedec eiaj mm dimensions (mm are the original dimensions) sot270-1 ms-020 95-02-04 99-12-27 b max. w m e e 1 1.3 0.8 0.53 0.40 0.32 0.23 38.9 38.4 14.0 13.7 3.2 2.9 0.18 1.778 15.24 15.80 15.24 17.15 15.90 1.73 5.08 0.51 4.0 m h c (e ) 1 m e a l seating plane a 1 w m b 1 e d a 2 z 42 1 22 21 b e pin 1 index 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. (1) (1) d (1) z a max. 12 a min. a max. sdip42: plastic shrink dual in-line package; 42 leads (600 mil) sot270-1
2000 aug 04 62 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a unit a 1 a 2 a 3 b p ce (1) eh e ll p z y w v q references outline version european projection issue date iec jedec eiaj mm 0.25 0.05 2.3 2.1 0.25 0.50 0.35 0.25 0.14 14.1 13.9 1 19.2 18.2 2.4 1.8 7 0 o o 0.15 2.35 0.1 0.3 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. 2.0 1.2 sot205-1 97-08-01 99-12-27 d (1) (1) (1) 14.1 13.9 h d 19.2 18.2 e z 2.4 1.8 d b p e q e a 1 a l p detail x l (a ) 3 b 11 y c d h b p e h a 2 v m b d z d a z e e v m a x 1 44 34 33 23 22 12 133e01 pin 1 index w m w m 0 5 10 mm scale qfp44: plastic quad flat package; 44 leads (lead length 2.35 mm); body 14 x 14 x 2.2 mm sot205-1 a max. 2.60
2000 aug 04 63 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 14 soldering 14.1 introduction this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. 14.2 through-hole mount packages 14.2.1 s oldering by dipping or by solder wave the maximum permissible temperature of the solder is 260 c; solder at this temperature must not be in contact with the joints for more than 5 seconds. the total contact time of successive solder waves must not exceed 5 seconds. the device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (t stg(max) ). if the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 14.2.2 m anual soldering apply the soldering iron (24 v or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. if the temperature of the soldering iron bit is less than 300 c it may remain in contact for up to 10 seconds. if the bit temperature is between 300 and 400 c, contact may be up to 5 seconds. 14.3 surface mount packages 14.3.1 r eflow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. 14.3.2 w ave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 14.3.3 m anual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2000 aug 04 64 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 14.4 suitability of ic packages for wave, re?ow and dipping soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. for sdip packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 3. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 4. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 5. wave soldering is only suitable for lqfp, qfp and tqfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. mounting package soldering method wave reflow (1) dipping through-hole mount dbs, dip, hdip, sdip, sil suitable (2) - suitable surface mount bga, sqfp not suitable suitable - hlqfp, hsqfp, hsop, htssop, sms not suitable (3) suitable - plcc (4) , so, soj suitable suitable - lqfp, qfp, tqfp not recommended (4)(5) suitable - ssop, tssop, vso not recommended (6) suitable -
2000 aug 04 65 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a 15 data sheet status note 1. please consult the most recently issued data sheet before initiating or completing a design. data sheet status product status definitions (1) objective speci?cation development this data sheet contains the design target or goal speci?cations for product development. speci?cation may change in any manner without notice. preliminary speci?cation quali?cation this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. product speci?cation production this data sheet contains ?nal speci?cations. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. 16 definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 17 disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 18 purchase of philips i 2 c components purchase of philips i 2 c components conveys a license under the philips i 2 c patent to use the components in the i 2 c system provided the system conforms to the i 2 c specification defined by philips. this specification can be ordered using the code 9398 393 40011.
2000 aug 04 66 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a notes
2000 aug 04 67 philips semiconductors product speci?cation digital tv sound demodulator/decoder tda9874a notes
? philips electronics n.v. sca all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. internet: http://www.semiconductors.philips.com 2000 70 philips semiconductors C a worldwide company for all other countries apply to: philips semiconductors, marketing communications, building be-p, p.o. box 218, 5600 md eindhoven, the netherlands, fax. +31 40 27 24825 argentina: see south america australia: 3 figtree drive, homebush, nsw 2140, tel. +61 2 9704 8141, fax. +61 2 9704 8139 austria: computerstr. 6, a-1101 wien, p.o. box 213, tel. +43 1 60 101 1248, fax. +43 1 60 101 1210 belarus: hotel minsk business center, bld. 3, r. 1211, volodarski str. 6, 220050 minsk, tel. +375 172 20 0733, fax. +375 172 20 0773 belgium: see the netherlands brazil: see south america bulgaria: philips bulgaria ltd., energoproject, 15th floor, 51 james bourchier blvd., 1407 sofia, tel. +359 2 68 9211, fax. +359 2 68 9102 canada: philips semiconductors/components, tel. +1 800 234 7381, fax. +1 800 943 0087 china/hong kong: 501 hong kong industrial technology centre, 72 tat chee avenue, kowloon tong, hong kong, tel. +852 2319 7888, fax. +852 2319 7700 colombia: see south america czech republic: see austria denmark: sydhavnsgade 23, 1780 copenhagen v, tel. +45 33 29 3333, fax. +45 33 29 3905 finland: sinikalliontie 3, fin-02630 espoo, tel. +358 9 615 800, fax. +358 9 6158 0920 france: 51 rue carnot, bp317, 92156 suresnes cedex, tel. +33 1 4099 6161, fax. +33 1 4099 6427 germany: hammerbrookstra?e 69, d-20097 hamburg, tel. +49 40 2353 60, fax. +49 40 2353 6300 hungary: see austria india: philips india ltd, band box building, 2nd floor, 254-d, dr. annie besant road, worli, mumbai 400 025, tel. +91 22 493 8541, fax. +91 22 493 0966 indonesia: pt philips development corporation, semiconductors division, gedung philips, jl. buncit raya kav.99-100, jakarta 12510, tel. +62 21 794 0040 ext. 2501, fax. +62 21 794 0080 ireland: newstead, clonskeagh, dublin 14, tel. +353 1 7640 000, fax. +353 1 7640 200 israel: rapac electronics, 7 kehilat saloniki st, po box 18053, tel aviv 61180, tel. +972 3 645 0444, fax. +972 3 649 1007 italy: philips semiconductors, via casati, 23 - 20052 monza (mi), tel. +39 039 203 6838, fax +39 039 203 6800 japan: philips bldg 13-37, kohnan 2-chome, minato-ku, tokyo 108-8507, tel. +81 3 3740 5130, fax. +81 3 3740 5057 korea: philips house, 260-199 itaewon-dong, yongsan-ku, seoul, tel. +82 2 709 1412, fax. +82 2 709 1415 malaysia: no. 76 jalan universiti, 46200 petaling jaya, selangor, tel. +60 3 750 5214, fax. +60 3 757 4880 mexico: 5900 gateway east, suite 200, el paso, texas 79905, tel. +9-5 800 234 7381, fax +9-5 800 943 0087 middle east: see italy netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 pakistan: see singapore philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland : al.jerozolimskie 195 b, 02-222 warsaw, tel. +48 22 5710 000, fax. +48 22 5710 001 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 319762, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 58088 newville 2114, tel. +27 11 471 5401, fax. +27 11 471 5398 south america: al. vicente pinzon, 173, 6th floor, 04547-130 s?o paulo, sp, brazil, tel. +55 11 821 2333, fax. +55 11 821 2382 spain: balmes 22, 08007 barcelona, tel. +34 93 301 6312, fax. +34 93 301 4107 sweden: kottbygatan 7, akalla, s-16485 stockholm, tel. +46 8 5985 2000, fax. +46 8 5985 2745 switzerland: allmendstrasse 140, ch-8027 zrich, tel. +41 1 488 2741 fax. +41 1 488 3263 taiwan: philips semiconductors, 5f, no. 96, chien kuo n. rd., sec. 1, taipei, taiwan tel. +886 2 2134 2451, fax. +886 2 2134 2874 thailand: philips electronics (thailand) ltd., 60/14 moo 11, bangna trad road km. 3, bagna, bangkok 10260, tel. +66 2 361 7910, fax. +66 2 398 3447 turkey: yukari dudullu, org. san. blg., 2.cad. nr. 28 81260 umraniye, istanbul, tel. +90 216 522 1500, fax. +90 216 522 1813 ukraine : philips ukraine, 4 patrice lumumba str., building b, floor 7, 252042 kiev, tel. +380 44 264 2776, fax. +380 44 268 0461 united kingdom: philips semiconductors ltd., 276 bath road, hayes, middlesex ub3 5bx, tel. +44 208 730 5000, fax. +44 208 754 8421 united states: 811 east arques avenue, sunnyvale, ca 94088-3409, tel. +1 800 234 7381, fax. +1 800 943 0087 uruguay: see south america vietnam: see singapore yugoslavia: philips, trg n. pasica 5/v, 11000 beograd, tel. +381 11 3341 299, fax.+381 11 3342 553 printed in the netherlands 753504/02/pp 68 date of release: 2000 aug 04 document order number: 9397 750 06927

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